Simultaneous read/write RAM

Details Simultaneous read/write RAM Simultaneous read/write RAM

1986-09-15

1988-11-15

Fears, Terrell W.

Static information storage and retrieval

Addressing

Current steering

365177, 365189, 365207, G11C 1134, G11C 700, G11C 702

Patent

active

047854227

ABSTRACT:
An alpha particle resistant memory cell and array with complementary, differential data in, data out and write enable inputs capable of independent, simultaneous read/write operations. During write operations, clocked differential write and data inputs steer cell current to induce differential cell voltages indicative of the stored data. During read operations, a read select input shifts the voltage levels of the selected cell to produce a distinguishable output which dominates over the other cells to appropriately steer current at a sense amplifier to identify the binary cell contents. A 64 row by 12 bit register stack, with split word write, master reset and read enable is also disclosed.

REFERENCES:
patent: 4125880 (1978-11-01), Taylor
patent: 4349895 (1982-09-01), Isogai
patent: 4607172 (1986-08-01), Fredericksen et al.
patent: 4608667 (1986-08-01), Barry
patent: 4641283 (1987-02-01), Wilhelm

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