Simultaneous communication of analog and binary information in a

Communications: electrical – Continuously variable indicating – With meter reading

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34087013, 34087024, H04J 300

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active

043463800

ABSTRACT:
A communication system for providing both analog information pulses and digital information pulses in a single frame of a pulse train, including circuitry for sequentially multiplexing and modulating a first given number "m" of analog information input channels to provide "m" analog information pulses in each frame of the pulse train to convey information respectively representative of the analog information in the analog information input channels; and circuitry for modulating a second given number "n" of binary information input channels to provide a variable number of digital information pulses and for multiplexing the variable number of digital information pulses in each frame of the pulse train sequentially to the analog information pulses, wherein the variable number of digital information pulses is within a range of 2.sup.n pulses to convey information respectively representative of the binary information in the "n" binary information input channels. A system for producing analog information signals and binary information signals from such a pulse train includes a binary counter for counting the number of information pulses in each frame of the pulse train; "m" gates coupled to given stages of the counter for producing "m" analog information signals respectively conveying the analog information conveyed by the "m" analog information pulses in each frame; and "n" gates coupled to given stages of the counter for producing "n" binary information signals containing binary information that is representative of the number of digital information pulses included in the count for each frame. The counter is reset by a sync pulse included in each frame of the pulse train the binary information is read from the counter in response to the sync pulse to produce the binary information signals.

REFERENCES:
patent: 3377585 (1968-04-01), Magnin
patent: 3430255 (1969-02-01), Avignon
patent: 3898647 (1975-08-01), Morra et al.
Saxton et al., Optimal Frame Synchronization, IEEE Transactions on Computers, 2/1977, vol. C-26, No. 2, pp. 170-174.

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