Simultaneous access and reset system for an active pixel sensor

Details Simultaneous access and reset system for an active pixel sensor Simultaneous access and reset system for an active pixel sensor

2005-09-27

2005-09-27

Garber, Wendy R. (Department: 2612)

Television

Camera, system and detail

Combined image signal generator and general image signal...

C348S296000, C348S302000, C250S208100

Reexamination Certificate

active

06950131

ABSTRACT:
A semiconductor chip for forming an electronic image in a digital camera includes an offset canceling column buffer for use with active pixel sensors having a small electrical buffer amplifier within each pixel The active pixel sensors are arranged on a semiconductor chip with simultaneous access and reset lines. Each active pixel sensor includes an source follower current amplifier, which introduces small variations in offset voltage, causing pattern noise to be introduced into the output signal of the sensed image. A method and apparatus is disclosed for addressing an array of active pixel sensors in a sequence coordinated with a column buffer for canceling pattern noise. To cancel pattern noise, the current row N in the APS cell array is accessed and sampled. Next, the following row N+1 is accessed thereby resetting the current row. Finally, the previous row N in the APS cell array is accessed a second time and sampled. Stored samples from the prior row N are subtracted from the previously sampled signals of the same prior row N to provide an output pixel signal value for which the APS offset voltage (pattern noise) is cancelled. In addition, accessing a row of the APS cell array M+1 rows ahead of the current row N electronically controls image exposure time, which is equal to M times the row scan rate.

REFERENCES:
patent: 4445117 (1984-04-01), Gaalema et al.
patent: 4810896 (1989-03-01), Tanaka et al.
patent: 5083016 (1992-01-01), Wyles et al.
patent: 5262870 (1993-11-01), Nakamura et al.
patent: 5434619 (1995-07-01), Yonemoto
patent: 5539461 (1996-07-01), Andoh et al.
patent: 5631704 (1997-05-01), Dickinson et al.
patent: 5698844 (1997-12-01), Shinohara et al.
patent: 5880460 (1999-03-01), Merrill
patent: 5962844 (1999-10-01), Merrill et al.
patent: 5965871 (1999-10-01), Zhou et al.
patent: 6067113 (2000-05-01), Hurwitz et al.
patent: 6218656 (2001-04-01), Guidash
patent: 6493030 (2002-12-01), Kozlowski et al.
patent: 6529242 (2003-03-01), Panicacci
patent: 6538693 (2003-03-01), Kozuka
patent: 6587146 (2003-07-01), Guidash
patent: 6603513 (2003-08-01), Berezin
patent: 6710804 (2004-03-01), Guidash
patent: 6803952 (2004-10-01), Watanabe
patent: 6809766 (2004-10-01), Krymski et al.
“A Pixel Size Shrinkage of Amplified MOS Imager with Two Line Mixing”, Yamawakiet al. IEEE Transactions on Electron Devices, vol. 43, No. 5 May 1996, pp 713-719.

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