Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
Reexamination Certificate
1998-12-15
2001-05-08
Stamber, Eric W. (Department: 2163)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Timing
C703S015000, C703S021000
Reexamination Certificate
active
06230115
ABSTRACT:
Simulator, Simulation Method, and Medium Having Simulation Program Recorded, Taking Account of Timing in Electronic Component and Signal Transmission through Transmission Line on Printed-circuit Board
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a simulator for verifying signal waveforms between electronic components mounted on a printed-circuit board. The invention more particularly relates to a simulator taking account of timing in an electronic component and signal transmission through transmission lines on a printed-circuit board.
2. Description of the Background Art
As the processing speed of an electronic component increases, timing simulation within the electronic component as well as transmission line simulation for wiring on a printed-circuit board become necessary in order to preliminarily detect any deficiency in circuits within the electronic component and that in a wiring pattern of the printed-circuit board.
FIG. 1
is a block diagram schematically illustrating a structure of a conventional timing simulator. The timing simulator includes a hardware description language holding section
101
provided with a logic circuit having its operation described with the hardware description language, a test pattern holding section
102
where a test pattern to be input to the logic circuit is stored, a timing simulation section
103
simulating the timing of the logic circuit by inputting the test pattern to the logic circuit having its operation described with the hardware description language, a timing simulation result holding section
104
holding result of the simulation executed by timing simulation section
103
, and a timing simulation result display section
105
displaying the result of the timing simulation.
FIG. 2
is a block diagram schematically illustrating a structure of a conventional transmission line simulator. The transmission line simulator includes a circuit connecting information holding section
111
holding information on connection between electronic components mounted on a printed-circuit board, a wiring portion simulation model holding section
112
holding a simulation model of a wiring portion (transmission line) of the printed-circuit board, an I/O model holding section
113
holding a driver section and a receiver section of a modeled electronic component, a transmission line simulation section
114
simulating the transmission line using the circuit connecting information, the wiring portion simulation model, and the I/O model, a transmission line simulation result holding section
115
holding the result of the simulation by transmission line simulation section
114
, a transmission delay information holding section
116
holding delay information of the transmission line determined by transmission line simulation section
114
, and a transmission line simulation result display section
117
displaying the result of the transmission line simulation.
Transmission line simulation section
114
simulates the transmission line and stores the result of the transmission line simulation in transmission line simulation result holding section
115
, and stores delay information with respect to the transmission line in transmission delay information holding section
116
in a form of SDF (Standard Delay Format) which can be used by the timing simulator.
When the entire printed-circuit board is simulated using the timing simulator and the transmission line simulator described above, timing simulation section
103
in the timing simulator uses the delay information stored in the SDF form in transmission delay information holding section
116
in the transmission line simulator to simulate circuits in an electronic component.
When the method is used of simulating the entire printed-circuit board using the timing simulator and the transmission line simulator described above, the result of the simulation presented to the user has the form which is supplied by the timing simulator. Therefore, the user can see the result only by logical values of a low level and a high level. Specifically, verification for signal integrity design taking account of reflection and ringing that are important factors for design of the printed-circuit board is difficult.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a simulator that can execute transmission line simulation taking account of a result of timing simulation or a result of circuit simulation.
Another object of the present invention is to provide a simulation method by which transmission line simulation taking account of a result of timing simulation or a result of circuit simulation is possible.
Still another object of the present invention is to provide a medium in which a simulation program is recorded that enables transmission line simulation taking account of a result of timing simulation or a result of circuit simulation to be done.
According to one aspect of the present invention, a simulator includes a timing simulation section executing timing simulation for a logic circuit of an electronic component, a time management section extracting logical operation time at an output terminal of the electronic component from a result of the timing simulation, a transmission line simulation section executing a simulation of a transmission line connected to the output terminal from the logical operation time extracted by the time management section, and a simulation result processing section combining the result of the simulation by the timing simulation section and a result of the simulation of the transmission line by the transmission line simulation section.
The simulation of the transmission line taking account of the result of the simulation executed for the logic circuit of the electronic component is possible, since the simulation result processing section combines the result of the simulation by the timing simulation section and the result of the simulation of the transmission line by the transmission line simulation section.
According to another aspect of the invention, a simulation method includes a step of executing simulation for a logic circuit of an electronic component to extract logical operation time at an output terminal of the electronic component from a result of the simulation, a step of executing simulation of a transmission line connected to the output terminal from the extracted logical operation time, and a step of combining the result of the simulation and a result of the simulation of the transmission line.
The simulation of the transmission line taking account of the result of the simulation executed for the logic circuit of the electronic component is possible since the result of the simulation and the result of the transmission line simulation are combined.
According to still another aspect of the present invention, a simulation program recorded in a medium includes a step of executing simulation for a logic circuit of an electronic component to extract logical operation time at an output terminal of the electronic component from a result of the simulation, a step of executing simulation of a transmission line connected to the output terminal from the extracted logical operation time, and a step of combining the result of the simulation and a result of the simulation of the transmission line.
The simulation of the transmission line taking account of the result of the simulation executed for the logic circuit of the electronic component is possible since the result of the simulation and the result of the transmission line simulation are combined.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 4996659 (1991-02-01), Yamaguchi et al.
patent: 5025402 (1991-06-01), Winkelstein
patent: 5535223 (1996-07-01), Horstmann et al.
patent: 5894421 (1999-04-01), Yamaguchi et al.
patent: 5974247 (1999-10-01), Yonezawa
Chowdhury
Ishida Tomoo
Nakamura Yoshiki
Ohsaki Hidefumi
Sasaki Yoshifumi
Shibayama Yasunori
Choi Kyle J.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Stamber Eric W.
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