Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
1998-12-18
2001-09-18
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S015000, C706S921000, C345S960000
Reexamination Certificate
active
06292766
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of electrical circuit simulation tools. More particularly, the present invention relates to a simulation tool input file generator that constructs input files for performing design analysis of electrical circuits such as input/output buffer rings in a microelectronic chip.
BACKGROUND OF THE INVENTION
Electronic technologies such as digital computers, calculators, audio devices, video equipment and telephone systems have facilitated increased productivity and reduced costs in a number of activities, including the analysis and communication of data, ideas and trends in most areas of business, science, education, and entertainment. There are a number of different complex electronic systems and circuits that have contributed to the realization of these benefits. These electronic systems and circuits usually have complicated configurations that require substantial resources be expended to optimize a design.
Designing complex electronic systems and circuits requires arduous analysis of numerous electrical characteristics, including the performance of extensive calculations and manipulation of complicated electrical principles of physics. Typically an analysis becomes even more complex when designers attempt to integrate numerous electronic components on a single integrated circuit chip, giving rise to a variety of factors requiring careful review and attention. For example, microelectronic chips typically manipulate and process signals that are adversely affected by noise. Negative noise impacts in input/output (IO) buffer circuits are usually generated by inductance and can typically be overcome or reduced by incorporating more power and ground IO buffer circuit connections to a chip. However, adding power and ground IO buffer circuit connections to a chip takes up precious chip space and expends valuable placement resources. Thus, a chip designer usually tries to reach an optimal balance in which there are a minimum number of power and ground IO buffer circuit connections taking up valuable chip space while at the same time ensuring there are enough power and ground IO buffer circuit connections to prevent noise interference from exceeding an acceptable level.
Analyzing potential noise interference in an IO buffer circuit is typically complicated by a variety of factors. Usually, there are numerous IO buffer circuits in a chip and the sheer quantity result in the expenditure of significant resources to analyze noise contributions in IO buffer circuits. This large quantity of IO buffer circuits usually comprises a variety of switching configurations that have different electrical characteristics for each specific load. A number of internal and external electrical characteristics, such as resistance, capacitance, inductance, mutual inductance, etc., contribute to noise generation and its adverse affects on a signal in an IO buffer circuit. An analysis of noise in IO buffer circuits should be performed dynamically in a manner that is cognizant of affects resulting from internal and external changes in electrical characteristics and the relative location of one IO buffer to other IO buffers. Thus, the complexity of an accurate analysis of adverse impacts due to noise interference in an IO buffer circuit requires significant resources.
Engineers regularly rely on computer aided engineering (CAE) design tools to assist with many of the complicated manipulations, computations and analyses that are required to design electronic circuits, especially when a part of the design is integrated on an integrated chip. Some CAE design tools are general-purpose simulation software programs that perform such functions as nonlinear DC analysis, nonlinear transient analysis, and linear AC analysis of electrical signals, while others are directed more to specific types of analysis. Circuits being designed or analyzed usually include resistors, capacitors, inductors, voltage and current sources, switches, uniform distributed RC lines, and common semiconductor devices such as bipolar junction transistors (BJT), junction field effect transistors (JFET), metal oxide surface field effect transistors (MOSFET), etc. A good analysis typically involves a review of numerous electrical characteristics associated with each component.
Analyzing an electronic system or circuit with multiple simulation tools usually provides better results and greater insight into performance abilities than a single simulation tool can provide. Typically different simulation tool families provide different benefits. For example, two common simulation software tools include simulation programs with integrated circuit emphasis (SPICE) and input/output buffer information specifications (IBIS). SPICE and IBIS simulation tools provide different advantages.
SPICE tools typically permit detailed electrical analysis of circuits including integrated circuit chips. For example, SPICE simulators are capable of performing device generated noise analysis for a given circuit including IO buffer circuits. For every frequency point in a specified range, a SPICE simulator is capable of calculating a value of the noise corresponding to a spectral density of a circuit variable viewed as a stationary gaussian stochastic. After calculating spectral densities, the values are integrated over the specified frequency range to arrive at the total noise voltage/current.
IBIS descriptions provide a “black box” behavioral model of an IO buffer circuit. Direct current versus voltage (IN) curves, rise and fall time, and packaging information are fed into an IBIS simulation tool. IBIS simulations are advantageous for a number of reasons including being well suited for simulating an entire electronic system of several hundred nets and drivers, presenting signal integrity or flight-time information in a relatively practical manner and quickly completing simulations.
Although electrical circuit simulation tools typically provide some assistance to engineers in designing and analyzing circuits, a sizable amount of valuable resources are expended in preparing for simulation operations, particularly the generation of simulation tool input files. In particular, performing advanced analysis of a circuit with simulation tools usually requires exorbitant amount of resources be expended, creating a complicated and lengthy input files. Generation of extensive input files in a manner that is compatible with a simulation tool usually requires a lot of error prone manual entries. Additional human resources are required to check that data is correctly typed into a computer by hand in appropriate entry locations associated with a particular simulation tool input file format. The difficulty of generating or altering an input file is compounded by the fact that simulation tool input files are typically in an inconvenient format that is somewhat difficult to read and comprehend. The input files for most simulation tools are so complex that it is usually not economical to generate a detailed electrical description of a chip's interface circuitry in a manner that permits detailed signal integrity analysis and characterization of internal and external signals in one simulation session.
Accordingly, what is required is a system and method that permits a designer to efficiently and effectively create and modify electrical circuit simulation tool input files. The system and method should enable a user to convey information conveniently in a manner that minimizes the amount of data a user has to enter manually to adequately describe features of the circuit being designed or analyzed. The system and method should allow a user to easily modify design features without manually modifying the entire simulation input file. Simulation tool input files provided by the system and method should include electrical component description simulation tool input files and electrical characteristic description simulation tool input files such as SPICE formatted input files and IBIS formatted input files. These simulation input files shou
Jen Henry
Mattos Derwin
Moshkelani Saeid
Sergent Douglas W.
Teska Kevin J.
VLSI Technology Inc.
Wagner , Murabito & Hao LLP
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