1997-06-13
2000-11-07
Teska, Kevin J.
39550048, G06F 9455
Patent
active
061426822
ABSTRACT:
An instruction emulation system translates target instructions into emulation instructions for execution by a host processor. A jump table has pointer entries employed to locate, in a translation instruction memory, sets of translating instructions for generating emulation instructions executable by the host for each of the differing types of target instructions. In one embodiment, each of pointer entries in the jump table has an entry length which is no greater than the shortest target instruction length, thereby enabling the jump table to handle target instructions of non-uniform instruction length. For another embodiment in which the target instructions comprise blocks of target instructions, including signal-handling target instructions, the jump table is augmented by a jump table shadow memory which saves memory requirements for code complication. In another embodiment, the jump table memory is partitioned into segments corresponding to the blocks stored in the target instruction memory. Selected ones of the segments of the jump table memory are uncompacted in accordance with a recent utilization criteria and non-selected ones of the segments are compacted.
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Choi Kyle J.
Telefonaktiebolaget LM Ericsson
Teska Kevin J.
LandOfFree
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