Boots – shoes – and leggings
Patent
1993-10-19
1996-08-27
Ramirez, Ellis B.
Boots, shoes, and leggings
G06F 1560
Patent
active
055507603
ABSTRACT:
Computational requirements are reduced for executing simulation code for a logic circuit design having at least some elements which are synchronously clocked by multiple phase clock signals, the simulation code including data structures associated with circuit modules and nodes interconnecting the circuit modules. The simulation code is preanalyzed and phase waveforms are stored each representing values occurring at a node in successive phases. Based on the preanalysis, modules are categorized in a first category, for which an event-based evaluation is to be performed in each phase of the simulation, and a second category for which no event-based evaluation need be performed in at least one but not all phases. For each phase of a second category module, an appropriate response to an event occurring with respect to the module is determined. A data structure is then included in the simulation code, having an entry for each module of the code for controlling the phases in which simulation code for evaluation of the module is not executed.
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Ulrich et al;"Concurrent Min-Max Simulation"; IEEE Conference on Design Automation; 2/25-28/1991.
Razdan et al;"Exploration of Periodicity in Logic Simulation of Synchronous Circuits"; IEEE Conference on CAE; 11/11-15/1990.
Bischoff Gabriel
Razdan Rahul
Ulrich Ernst G.
Digital Equipment Corporation
Fisher Arthur W.
Maloney Denis G.
Ramirez Ellis B.
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