Simulation method and computer-readable storage medium...

Details Simulation method and computer-readable storage medium... Simulation method and computer-readable storage medium...

2008-05-23

2011-12-13

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S108000, C716S109000, C716S113000, C716S133000, C716S134000, C703S019000

Reexamination Certificate

active

08079006

ABSTRACT:
A simulation method, to be implemented in a computer, carries out a simulation of a semiconductor integrated circuit. The simulation method carries out a layout analysis based on layout data of a circuit formed by cells and stores values of layout parameters obtained by the layout analysis. Basic cell characteristics of the cells are read from a net list representing the extracted basic cell characteristics by the layout parameters and the basic cell characteristics represented by the layout parameters are stored. The stored values of the layout parameters are read and substituted into the basic cell characteristics represented by the layout parameters to obtain cell characteristics, and the cell characteristics are stored. An operation of the circuit is analyzed using the cell characteristics that are obtained.

REFERENCES:
patent: 2001/0018758 (2001-08-01), Tanaka et al.
patent: 2002/0077798 (2002-06-01), Inoue et al.
patent: 2007/0106966 (2007-05-01), Inoue et al.
patent: 2007/0204250 (2007-08-01), Moroz et al.
patent: 2009/0013292 (2009-01-01), Brunet
patent: 11-284170 (1999-10-01), None

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