Simulation/emulation system and method

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

39550044, G06F 9455, G06F 1750

Patent

active

060092564

ABSTRACT:
The SEmulation system provides four modes of operation: (1) Software Simulation, (2) Simulation via Hardware Acceleration, (3) In-Circuit Emulation (ICE), and (4) Post-Simulation Analysis. At a high level, the present invention may be embodied in each of the above four modes or various combinations of these modes. At the core of these modes is a software kernel which controls the overall operation of this system. The main control loop of the kernel executes the following steps: initialize system, evaluate active test-bench processes/components, evaluate clock components, detect clock edge, update registers and memories, propagate combinational components, advance simulation time, and continue the loop as long as active test-bench processes are present. Each mode or combination of modes provides the following main features or combinations of main features: (1) switching among modes, manually or automatically; (2) compilation process to generate software models and hardware models; (3) component type analysis for generating hardware models; (4) software clock set-up to avoid race conditions through, in one embodiment, gated clock logic analysis and gated data logic analysis; (5) software clock implementation through, in one embodiment, clock edge detection in the software model to trigger an enable signal in the hardware model, send signal from the primary clock to the clock input of the clock edge register in the hardware model via the gated clock logic, send a clock enable signal to the enable input of the hardware model's register, send data from the primary clock register to the hardware model's register via the gated data logic, and reset the clock edge register disabling the clock enable signal to the enable input of the hardware model's registers; (6) log selective data for debug sessions and post-simulation analysis; and (7) combinational logic regeneration.

REFERENCES:
patent: 3106698 (1963-10-01), Unger
patent: 3287702 (1966-11-01), Borck, Jr. et al.
patent: 3287703 (1966-11-01), Slotnick
patent: 3473160 (1969-10-01), Wahlstrom
patent: 4020469 (1977-04-01), Manning
patent: 4306286 (1981-12-01), Cocke et al.
patent: 4386403 (1983-05-01), Hsieh et al.
patent: 4488354 (1984-12-01), Chan et al.
patent: 4503386 (1985-03-01), DasGupta et al.
patent: 4578761 (1986-03-01), Gray
patent: 4612618 (1986-09-01), Pryor et al.
patent: 4621339 (1986-11-01), Wagner et al.
patent: 4642487 (1987-02-01), Carter
patent: 4656580 (1987-04-01), Hitchcock, Sr. et al.
patent: 4656592 (1987-04-01), Spaanenburg et al.
patent: 4675832 (1987-06-01), Robinson et al.
patent: 4695999 (1987-09-01), Lebizay
patent: 4697241 (1987-09-01), Lavi
patent: 4700187 (1987-10-01), Furtek
patent: 4706216 (1987-11-01), Carter
patent: 4736338 (1988-04-01), Saxe et al.
patent: 4740919 (1988-04-01), Elmer
patent: 4744084 (1988-05-01), Beck et al.
patent: 4747102 (1988-05-01), Funatsu
patent: 4752887 (1988-06-01), Kuwahara
patent: 4758985 (1988-07-01), Carter
patent: 4768196 (1988-08-01), Jou et al.
patent: 4777606 (1988-10-01), Fournier
patent: 4786904 (1988-11-01), Graham, III et al.
patent: 4787061 (1988-11-01), Nei et al.
patent: 4791602 (1988-12-01), Resnick
patent: 4803636 (1989-02-01), Nishiyama et al.
patent: 4811214 (1989-03-01), Nosenchuck et al.
patent: 4815003 (1989-03-01), Putatunda et al.
patent: 4823276 (1989-04-01), Hiwatashi
patent: 4827427 (1989-05-01), Hyduke
patent: 4835705 (1989-05-01), Fujino et al.
patent: 4849904 (1989-07-01), Aipperspach et al.
patent: 4849928 (1989-07-01), Hauck
patent: 4862347 (1989-08-01), Rudy
patent: 4870302 (1989-09-01), Freeman
patent: 4872125 (1989-10-01), Catlin
patent: 4876466 (1989-10-01), Kondou et al.
patent: 4882690 (1989-11-01), Shinsha et al.
patent: 4901259 (1990-02-01), Watkins
patent: 4901260 (1990-02-01), Lubachevsky
patent: 4908772 (1990-03-01), Chi
patent: 4914612 (1990-04-01), Beece et al.
patent: 4918440 (1990-04-01), Furtek
patent: 4918594 (1990-04-01), Onizuka
patent: 4922432 (1990-05-01), Kobayashi et al.
patent: 4924429 (1990-05-01), Kurashita et al.
patent: 4931946 (1990-06-01), Ravindra et al.
patent: 4935734 (1990-06-01), Austin
patent: 4942536 (1990-07-01), Watanabe et al.
patent: 4942615 (1990-07-01), Hirose
patent: 4945503 (1990-07-01), Takasaki
patent: 4949275 (1990-08-01), Nonaka
patent: 4951220 (1990-08-01), Ramacher et al.
patent: 4965739 (1990-10-01), Ng
patent: 5003487 (1991-03-01), Drumm et al.
patent: 5023775 (1991-06-01), Poret
patent: 5041986 (1991-08-01), Tanishita
patent: 5046017 (1991-09-01), Yuyama et al.
patent: 5051938 (1991-09-01), Hyduke
patent: 5053980 (1991-10-01), Kanazawa
patent: 5081602 (1992-01-01), Glover
patent: 5084824 (1992-01-01), Lam et al.
patent: 5093920 (1992-03-01), Agrawal et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5114353 (1992-05-01), Sample
patent: 5126966 (1992-06-01), Hafeman et al.
patent: 5128871 (1992-07-01), Schmitz
patent: 5140526 (1992-08-01), McDermith et al.
patent: 5146460 (1992-09-01), Ackerman et al.
patent: 5189628 (1993-02-01), Olsen et al.
patent: 5193068 (1993-03-01), Britman
patent: 5197016 (1993-03-01), Sugimoto et al.
patent: 5224056 (1993-06-01), Chene et al.
patent: 5231588 (1993-07-01), Agrawal et al.
patent: 5231589 (1993-07-01), Itoh et al.
patent: 5233539 (1993-08-01), Agrawal et al.
patent: 5253181 (1993-10-01), Marui et al.
patent: 5258932 (1993-11-01), Matsuzaki
patent: 5259006 (1993-11-01), Price et al.
patent: 5260881 (1993-11-01), Agrawal et al.
patent: 5263149 (1993-11-01), Winlow
patent: 5272651 (1993-12-01), Bush et al.
patent: 5329470 (1994-07-01), Sample et al.
patent: 5343406 (1994-08-01), Freeman et al.
patent: 5352123 (1994-10-01), Sample et al.
patent: 5371390 (1994-12-01), Mohsen
patent: 5377124 (1994-12-01), Mohsen
patent: 5425036 (1995-06-01), Liu et al.
patent: 5448496 (1995-09-01), Butts et al.
patent: 5448522 (1995-09-01), Huang
patent: 5452227 (1995-09-01), Kelsey et al.
patent: 5452231 (1995-09-01), Butts et al.
patent: 5452239 (1995-09-01), Dai et al.
patent: 5467462 (1995-11-01), Fujii
patent: 5475830 (1995-12-01), Chen et al.
patent: 5477475 (1995-12-01), Sample et al.
patent: 5504354 (1996-04-01), Mohsen
patent: 5563829 (1996-10-01), Huang
patent: 5572710 (1996-11-01), Asano et al.
patent: 5612891 (1997-03-01), Butts et al.
patent: 5644515 (1997-07-01), Sample et al.
patent: 5649167 (1997-07-01), Chen et al.
patent: 5654564 (1997-08-01), Mohsen
patent: 5657241 (1997-08-01), Butts et al.
patent: 5661409 (1997-08-01), Mohsen
patent: 5661662 (1997-08-01), Butts et al.
patent: 5663900 (1997-09-01), Bhandari et al.
patent: 5748875 (1998-05-01), Tzori
patent: 5771370 (1998-06-01), Klein
patent: 5796623 (1998-08-01), Butts et al.
patent: 5838948 (1998-11-01), Bunza
patent: 5841967 (1998-11-01), Sample et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Simulation/emulation system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Simulation/emulation system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simulation/emulation system and method will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2388512

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.