Boots – shoes – and leggings
Patent
1994-10-17
1997-05-13
Teska, Kevin J.
Boots, shoes, and leggings
3642323, G06F 9455
Patent
active
056301006
ABSTRACT:
A method for converting a multiple-phase circuit to single-clock-edge circuit includes the steps of receiving a data signal at an input terminal, receiving a system clock signal having a system clock frequency and receiving a phase clock signal having a frequency divided from the system clock frequency. The data signal is transferred to an output terminal when the phase clock signal is active and latched upon the occurrence of an edge transition of the system clock signal when the phase clock signal is active. When the phase clock signal is inactive, the latched data signal is latched again upon the occurrence of the edge transition of the system clock signal. The latched data signal is transferred to the output terminal when the phase clock signal is inactive.
REFERENCES:
patent: 4757264 (1988-07-01), Lee et al.
patent: 4820992 (1989-04-01), Avis
patent: 4899273 (1990-02-01), Omoda et al.
patent: 4965524 (1990-10-01), Patchen
Intel "IAPAX 86/88, 186/188 User's Manual Hardware Reference", pp. 2-44-2-46, 1985.
Brian Case, "AMD Unveils First Superscalar 29K Core", Microprocessor Report, Oct. 24, 1994, pp. 23-26.
Michael Slater, "AMD's K5 Designed to Outrun Pentium", Microprocessor Report, Oct. 24, 1994, pp. 1, 6-11.
Ganapathy Gopi
Witt David B.
Advanced Micro Devices , Inc.
Garbowski Leigh Marie
Teska Kevin J.
LandOfFree
Simulating multi-phase clock designs using a single clock edge b does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Simulating multi-phase clock designs using a single clock edge b, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simulating multi-phase clock designs using a single clock edge b will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1393505