Simulated host computer/channel interface system

Details Simulated host computer/channel interface system Simulated host computer/channel interface system

1992-12-15

1995-02-07

Ramirez, Ellis B.

Boots, shoes, and leggings

364578, 364DIG1, 3642383, 3642384, 395425, 395500, 371 162, G06F 1560

Patent

active

053880609

ABSTRACT:
A programmable channel emulator is disclosed which exercises a control unit to which it is attached to detect timing problems or error conditions in the control unit. A plurality of channel emulators can be concurrently operated in order to exercise the control unit in a multiple channel environment. The operation of the plurality of channel emulators is synchronized and controlled by a shared processor in order to emulate possible multiple channel situations that the channel control unit could encounter. Included in this system is a programmable delay circuit that operates under software control to provide a precisely controlled delay between receipt and transmission of signals between each emulator and a connected channel.

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patent: 4878168 (1989-10-01), Johnson et al.
patent: 5051888 (1991-09-01), Hansen et al.
patent: 5132971 (1992-07-01), Oguma et al.
Santoni; "Testers are getting better at finding microprocessor flaws", Electronics 1976.

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