Simplified synchronous forward/backward binary counter

Details Simplified synchronous forward/backward binary counter Simplified synchronous forward/backward binary counter

1986-12-22

1988-07-19

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Pulse counting or dividing chains

Using bistable regenerative trigger circuits

377111, H03K 2102, H03K 2356

Patent

active

047590440

ABSTRACT:
In a binary counter made using the I.sup.2 L technique, the realization of different gate types is complicated, because only NAND gates can be obtained directly. According to the invention, a particular circuit construction is indicated, which is constructed according to the I.sup.2 L technique, is very simple and requires only a few gate transit times so that a comparatively high switching speed can be attained. In the circuit construction of the invention, both the flipflops and their associated combinatorial networks are fabricated in the I.sup.2 L technique, using only NAND gates. Nevertheless, because of the particular circuit configuration of the invention, all of the necessary internal signals can be generated in an efficient manner.

REFERENCES:
patent: 3906195 (1975-09-01), Maejima
patent: 4280190 (1981-07-01), Smith
patent: 4509183 (1985-04-01), Wright

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