Simplified page mode programming circuit for EEPROM requiring on

Details Simplified page mode programming circuit for EEPROM requiring on Simplified page mode programming circuit for EEPROM requiring on

1997-05-15

1998-07-14

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518523, G11C 1604

Patent

active

057814759

ABSTRACT:
An apparatus for page mode programming of an EEPROM cell array applications is described. The apparatus comprises a control gate potential control means and a bit line potential control means. The control gate potential control means is connected to the control gate of the EEPROM cell to select the potential for the control gate of the EEPROM cell, while the bit line potential control means is connected to the bit line of the EEPROM cell to select the potential for the bit line. A bit line of the EEPROM cell is first selected by a bit line control signal, then a control gate control signal determines whether provides the high voltage to the control gate of the EEPROM cell.

REFERENCES:
patent: 5101379 (1992-03-01), Lin et al.
patent: 5615149 (1997-03-01), Kobayashi et al.
patent: 5621689 (1997-04-01), Sakakibara et al.

Affiliated with

Also associated with

Rating

Simplified page mode programming circuit for EEPROM requiring on does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Simplified page mode programming circuit for EEPROM requiring on, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Simplified page mode programming circuit for EEPROM requiring on will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1889624