Simplified low-noise output buffer circuit

Details Simplified low-noise output buffer circuit Simplified low-noise output buffer circuit

1993-11-29

1995-07-04

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Slope control of leading or trailing edge of rectangular or...

327108, 327180, 327185, 327310, 327312, 327313, 327379, 327387, 327391, H03K 512, H03K 1920, H03K 500, H03K 17687

Patent

active

054303354

ABSTRACT:
An output buffer circuit has a pull-up output transistor controlled by a first node and a pull-down output transistor controlled by a second node. The first node is coupled to the second node through a switching stage controlled by feedback from the output terminal. When the output buffer circuit is switched between the high and low output states, the switching stage is initially on, switches off shortly after the potential of the output terminal begins to change, then switches on again when the output terminal reaches a certain intermediate potential.

REFERENCES:
patent: 4567378 (1986-01-01), Raver
patent: 4731553 (1988-03-01), Van Lehn et al.
patent: 4806794 (1989-02-01), Walters, Jr.
patent: 4818901 (1989-04-01), Young et al.
patent: 4820942 (1989-04-01), Chan
patent: 4963774 (1990-10-01), Masuda
patent: 5025182 (1991-06-01), Farmer
patent: 5111076 (1992-05-01), Tarng
Satoru Tanoia, "Semiconductor Integrated Circuit with Low-Noise Output Buffers," U.S. patent application Ser. No. 07/869,257, filed Apr. 15, 1992, U.S. Pat. No. 5,237,213.

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