Simplified contact method for high density CMOS

Details Simplified contact method for high density CMOS Simplified contact method for high density CMOS

1994-06-30

1995-05-30

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 41, 437 44, 437984, 148DIG141, H01L 21265

Patent

active

054200571

ABSTRACT:
A self-aligned method of forming contacts to a transistor gate, source and drain reduces the required spacing between the nominal center of the gate and electrode at little cost in process complexity by the provision of a sidewall positioned above the LDD-defining sidewall and extending above the top Of the gate by a buffer amount sufficient to protect the gate during the process of opening a source or drain contact.

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patent: 5171700 (1992-12-01), Zamanian
patent: 5200357 (1993-04-01), Collot et al.
patent: 5229326 (1993-07-01), Dennison et al.
patent: 5234850 (1993-08-01), Liao
patent: 5244823 (1993-09-01), Adan
patent: 5338698 (1994-08-01), Subbanna
patent: 5364804 (1994-11-01), Ho et al.

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