Multiplex communications – Duplex – Convertible to half duplex
Reexamination Certificate
1998-10-15
2002-10-15
Vincent, David (Department: 2732)
Multiplex communications
Duplex
Convertible to half duplex
C370S294000
Reexamination Certificate
active
06466551
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a simplex/duplex switching system which can switch simplex/duplex structures, and in particular to a simplex/duplex switching system which has as a feature a simplex/duplex structure between a communication channel device and a signal processor.
2. Related Arts
FIG. 9
is a block diagram illustrating an example simplex connection structure for a communication channel device, which serves as a first device, and a line signal processor, which serves as a second device.
The communication channel device can be, for example, a time switch for an STM switchboard, and the line signal processor can be a subscriber circuit which handles a subscriber line at the STM switchboard and can also be a common unit for changing the speed of a time slot.
In
FIG. 9
, a communication channel device
1
has a duplex structure consisting of types #0 and #1. In this case, n line signal processors
2
receive a frame signal from the #0 or the #1 communication channel device
1
, so that time slots which are multiplexed in a frame signal are output separately to the individual n line signal processors
2
.
Therefore, assuming that there are n simplex signal processors, time slots TS corresponding to the communication channel devices are:
TS(S
1
) . . . TS group for S
1
TS(S
2
) . . . TS group for S
2
TS(Sn) . . . TS group for Sn.
In
FIG. 10
is shown an example of the duplexing of the n line signal processors (T
1
to Tn). That is, when n line signal processors
2
(T
1
to Tn) are paired to obtain ½n pairs of line processors
2
, the relationships of the communication channel devices and time slots are
TS(T
1
)=TS(T
2
)
TS(T
3
)=TS(T
4
)
TS(Tn−1)=TS(Tn).
The same TS is output by the communication channel device to the paired signal processors
2
.
In this manner, the line signal processors
2
having a simplex structure and a duplex structure are separately connected to the communication channel device
1
. Generally, the devices are constructed as panel units, and as is shown in
FIG. 11
, are assembled on a shelf inside the case of a communication apparatus. For this purpose, designated areas on the self are selected for the assembly of the simplex and the duplex deices.
Thus, when the number of devices having a simplex structure or a duplex structure is smaller than the number of areas which are available on a shelf, there are extra, unoccupied spaces on the shelf, and this contributes to an unwanted increase in the size of a communication apparatus.
Furthermore, since the essential circuit portions of a signal processor handling simplex/duplex configurations are used in common, it is uneconomical for a signal processor to be designed as a dedicated simplex structure or as a dedicated duplex structure. It is preferable that the signal processor be employed selectively as a simplex structure or as a duplex structure.
SUMMARY OF THE INVENTION
It is, therefore, one objective of the present invention to provide a simplex/duplex switching system which can easily handle either a simplex configuration or a duplex configuration.
It is another objective of the present invention to provide a simplex/duplex switching system for a communication apparatus which comprises a communication channel device and a line signal processor.
To achieve the above objectives, according to the present invention, the basic structure of a simplex/duplex switching system includes:
a first device for outputting a predetermined frame signal carrying a plurality of time slot signals; and
multiple second devices, each of which is paired with another device having the same structure,
wherein, when paired second devices together serve as a simplex device, each of the second devices alternately receives the time slot signals included in the predetermined frame signal, and
wherein, when paired second devices together serve as a duplex device, both of the second devices receive all of the time slot signals included in the predetermined frame signal.
In the above structure, the first device is a communication channel device, and the paired second devices are signal processors.
Also, the first device has a duplex structure constituted by two communication channel devices having the same arrangement.
In addition, when the paired second devices together serve as a simplex device, multiplexed signals output by the second devices are received by the first device, which in turn generates a frame signal.
Further, when the pair of the second devices serves as a duplex device, a signal output by one of the second devices is received by the first device, which in turn generates a frame signal.
Moreover, the first device is a communication channel device, and the paired second devices are signal processors.
Other objectives and features of the invention will become apparent during the course of the description of the preferred embodiments, which is given while referring to the accompanying drawings.
REFERENCES:
patent: 4633461 (1986-12-01), Banton et al.
patent: 5051982 (1991-09-01), Brown et al.
patent: 5623489 (1997-04-01), Cotton et al.
patent: 5987098 (1999-11-01), Wintour
patent: 6125111 (2000-09-01), Snow et al.
patent: 59-125422 (1984-07-01), None
patent: 8-317017 (1996-11-01), None
Miyashita Naoshi
Sakai Masataka
Katten Muchin Zavis & Rosenman
Phunkulh Bob A.
Vincent David
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