SIMD-RISC microprocessor architecture

Details SIMD-RISC microprocessor architecture SIMD-RISC microprocessor architecture

2005-02-24

2009-02-24

Kang, Paul (Department: 2144)

Electrical computers and digital processing systems: multicomput

Computer-to-computer protocol implementing

C710S308000, C710S022000, C712S022000, C712S225000, C711S154000

Reexamination Certificate

active

07496673

ABSTRACT:
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A hardware sandbox structure is provided for security against the corruption of data among the programs being processed by the processing units. The uniform software cells contain both data and applications and are structured for processing by any of the processors of the network. Each software cell is uniquely identified on the network.

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