Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With specified crystal plane or axis
Reexamination Certificate
2007-10-15
2011-11-29
Tran, Minh-Loan T (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With specified crystal plane or axis
C257S620000, C257SE31040, C257SE21345, C118S500000, C211S041180, C432S253000
Reexamination Certificate
active
08067820
ABSTRACT:
Provided is a method applicable to the production of silicon wafers having crystal orientation <100> or <110> and consisting in specifying wafer-supporting positions on the occasion of heat treatment in a vertical heat treatment furnace as well as a heat treatment jig for use in carrying out that method. It becomes possible to suppress the shear stress which contributes to the extension of the slip generated at each wafer-supporting element contact point as an initiation, suppress slip growth and thus markedly improve the yield of heat-treated silicon wafers. The heat-treated wafer obtained by using the supporting method and the heat treatment jig has few slip, in particular has no long and large slip, and is high in quality.
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Arroyo Teresa M
Clark & Brody
Sumco Corporation
Tran Minh-Loan T
LandOfFree
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