Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2001-02-02
2002-03-26
Diamond, Alan (Department: 1753)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C136S258000, C136S256000, C136S261000, C257S064000, C257S461000, C257S465000, C257S459000, C257S431000, C427S588000, C427S578000, C427S074000, C427S058000, C438S488000, C438S166000, C438S487000, C423S348000
Reexamination Certificate
active
06362021
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a monolithically integrated solar cell module, and in particular, a module including a plurality of integrated solar cells each containing an active polycrystalline silicon layer having silicon grains with a high aspect ratio.
BACKGROUND OF THE INVENTION
Photovoltaic semiconductor devices, also known as solar cells, convert sunlight into electricity. In theory, solar cells could provide an infinite supply of renewable energy. The interest in solar cell technology was perhaps at its peak during the oil shortages of the 1970's. Since that time only a few select companies have devoted substantial research and development funds to solar cell technology; most major manufacturers abandoned the technology due to economic considerations coupled with the conversion inefficiencies inherent in photovoltaic semiconductor materials. The companies that remain dedicated to solar cell technology have made significant improvements in solar cell and module design, thus increasing output efficiencies and reducing manufacturing cost. Substantial room for improvement, however, remains.
A typical solar cell consists of a wafer of p-type silicon having an upper n-type region diffused therein. The regions adjacent to the interface between the p-type silicon and the n-type silicon define the p-n junction of the device. A unitary metal electrode is deposited on the bottom of the p-type silicon wafer and a comb-shaped metal electrode is deposited on the upper surface of the n-type silicon region to collect charges generated at the p-n junction when the solar cell is exposed to sunlight.
One of the inherent problems with solar cells is the inability of individual solar cells to produce significant voltage levels. For example, most individual solar cells on the market today produce about ½ volt per cell. Consequently, it is necessary to arrange a plurality of solar cells in a series-connected array in order to provide a solar cell module of appreciable voltage rating.
While modules of discrete, series-connected solar cells have been widely adopted in industry, there are several problems with this design. First, to provide a solar cell module rated at, say, 18 volts, it is necessary to separately manufacture and handle
36
discrete, ½-volt solar cells and then “string” the cells together in series to achieve the desired voltage rating. Variations in performance among the individual solar cells can lead to unacceptable performance of the overall module, and moreover, failure of a single solar cell can lead to failure of the entire module.
Second, the necessity of handling 36 separate solar cells to build a single solar cell module rated at 18 volts inherently increases the overall cost to manufacture such a module.
Third, in order to “string” the individual cells together, it is necessary to employ external metallization “tabs” welded or soldered together. It is estimated that these metallized interconnects account for more than 90 percent of all failures in solar cell modules.
Significant strides have been made to reduce the overall cost of these types of solar cell modules, particularly in the area of materials. For example, significant reductions in cost of solar cells have been achieved by using thin-film solar cells such as the SILICON-FILM™ solar cell described by A. M. Barnett et al. in U.S. Pat. No. 5,057,163, which is incorporated herein by reference. The SILICON-FILM™ technology makes use of proprietary heating steps to provide polycrystalline silicon thin films of unique microstructure, which enhances the performance of solar cells employing such polycrystalline silicon films. This growth technology continues to improve, such as disclosed in U.S. Pat. Nos. 5,336,335 and 5,496,416, and as disclosed in U.S. Patent application Ser. No. 09/033,155, filed Mar. 2, 1998, now U.S. Pat. No. 6,111,191, all of which are incorporated herein by reference.
Even though the SILICON-FILM™ and growth technologies discussed above have provided significant cost reduction in the manufacture of silicon solar cell modules, the problems associated with handling large numbers of separate cells to manufacture a single module, and the tabbing and stringing operations necessary to connect the discrete solar cells, still present significant obstacles to large-scale, low-cost manufacture of high voltage modules.
Having recognized some of the inherent problems discussed above, the industry has attempted to provide monolithic designs wherein a plurality of isolated solar cells are formed in an integrated manner on a single substrate. For example, Warner U.S. Pat. No. 3,994,012 discloses a monolithic photovoltaic semiconductor device including a plurality of solar cells isolated from one another on a single substrate. The complex manufacturing process used to produce such a device, however, is impractical and cost prohibitive on a mass production/commercial scale.
Chiang et al. U.S. Pat. No. 4,173,496 also discloses an integrated solar cell array wherein a plurality of solar cells are formed on a substrate of single crystal silicon in physical isolation from one another. Like the process of Warner, however, the complexity of the process disclosed in Chiang et al. makes the device prohibitively expensive to manufacture on a mass-production scale. Moreover, the cost drawbacks inherent in the use of single crystal silicon make the device per se unacceptable for mass-production and commercial viability.
Rand et al. U.S. Pat. No. 5,266,125 represents a significant improvement over the devices and processes disclosed in Warner and Chiang, but still requires relatively complex steps to manufacture the device. For example, the device shown in
FIG. 1
of Rand et al. requires a plurality of metal interconnects disposed in the dice-isolated trenches separating each individual solar cell. Not only are such metallization strips difficult and expensive to install, but also the width of the trenches themselves reduces the upper surface area of the module available for interaction with incident sunlight. While the device in
FIG. 4
of Rand et al. does not require the metallization strips of the device in
FIG. 1
of Rand, it does require sub-substrate conducting regions to provide series connection of adjacent cells. This makes the overall process for making the device shown in
FIG. 4
of Rand rather complex, and thus, rather expensive, especially on a mass-production scale.
Thus, there is significant room for improvement in high voltage solar cell modules. The miniaturization of electronic devices necessarily requires a corresponding miniaturization of the solar cell modules used to power or recharge the batteries of those devices. Monolithic solar cell module designs are particularly attractive in this regard, since a solar cell of fixed area can be segregated into as many isolated solar cells as needed to achieve the voltage requirement of the associated electronic device. To date, however, no entity has been able to provide a high-efficiency monolithic solar cell module at low manufacturing cost.
One solution is to use polycrystalline silicon as opposed to either single crystal or amorphous silicon. It would be necessary, however, to use relatively thick active layers when using polycrystalline silicon, in order to establish silicon grains having a width sufficient to prevent grain boundary-induced minority carrier recombination. That is, even with the growth techniques discussed above, it is difficult to form silicon grains having an aspect ratio (d:t) of more than 1. Thus, a silicon grain having a diameter of 40 microns, for example, would require an active layer thickness of 40 microns.
SUMMARY OF THE INVENTION
It is a first object of the present invention to provide a polycrystalline film of silicon having silicon grains with a sufficiently high aspect ratio that allows the formation of relatively thin, electronically effective active layers for devices such as solar cells.
It is another object of the present invention to provide a monolithically integrated
Barnett Allen M.
Ford David H.
Hall Robert B.
Rand James A.
AstroPower, Inc.
Burr & Brown
Diamond Alan
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