Silicon quantum wires

Details Silicon quantum wires Silicon quantum wires

1994-04-26

2002-04-09

Jackson, Jr., Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S016000, C257S021000, C257S103000

Reexamination Certificate

active

06369405

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method of making silicon quantum wires and to devices made by the method.
2. Discussion of Prior Art
Semiconductor quantum wires are a recent development in the emerging field of low dimensional semiconductor device structures. The first such structure was the one dimensional quantum well, in which a relatively narrow bandgap semiconductor layer is sandwiched between two relatively wider bandgap semiconductor layers. A typical quantum well layer thickness is in the range 1 to 10 nm. Charge carriers with energies intermediate the bandgaps of the two materials are free in the narrow bandgap material but would be bound in the wider bandgap material. This produces what is referred to as quantum confinement of charge carriers within a quantum well formed by a narrow bandgap layer. There is two-dimensional freedom for charge carriers within the plane of the layer, and one-dimensional confinement. This provides a quantum well layer or “quantum plane”. One dimensional confinement effects in a-Si:H quantum well layers have been reported by Abeles and Tiedje in Physical Review Letters Vol. 51. pages 2003-2006(1983). Structures containing many quantum well layers are often referred to as “superlattices”. There are well established growth techniques available for fabricating Si-based superlattices.
It is also known to produce so-called silicon “quantum dots” in which there is three-dimensional confinement. Furukawa et al, in Phys. Rev. B38, p5726(1988), report the production of very small crystalline particles of silicon with diameters in the range 2 nm to 5 nm and having hydrogen-passivated surfaces, This material has polyhedral or sphere-like grains, as indicated by transmission electron microscopy data, and extensive Si-H
2
surface chemical groups detected by infrared absorption. Its appearance is that of a pale yellow powder. It exhibits efficient room temperature photoluminescence in the red region of the visible spectrum, ie at photon energies well above the bulk silicon semiconductor bandgap. Photoconductivity and optical absorption data suggest that the optical bandgap is widened up to 2.4 eV, more than twice the 1.1 eV bulk silicon value.
One major reason for the interest in quantum confinement in semiconductors arises from the desire to create novel electronic and luminescent devices. Bulk undoped silicon is unfortunately characterised by very poor luminescent properties. Nevertheless, there is considerable interest in producing a silicon-based or silicon-compatible light emitting device for incorporation in opto- electronic integrated circuits. International Application No PCT/GB88/00319 published under the Patent Co-operation Treaty as No W088/09060 relates to an electroluminescent device produced by creating luminescent defect centres in silicon by electron beam irradiation.
It is a requirement of materials for making electroluminescent devices that they have adequate electrical conductivity. They are required to carry appreciable electric currents at low to moderate voltages to create luminescence. In this regard, the prior art of Furukawa et al is inappropriate. The quantum dot material has a resistivity greater than 10
11
Ohm cm, many orders of magnitude above that appropriate for an acceptable semiconductor device. It seems unlikely that this can be significantly improved due to the difficulty of obtaining conduction between adjacent crystallites. This difficulty might be overcome in silicon quantum wires, which might provide better conductivity combined with similar quantum confinement effects.
The production of semiconductor quantum wire structures in the prior art has been directed to patterning superlattices by lithographic and etching techniques. Such work in the GaAs/AlGaAs ternary material system has been produced inter alia by Kapon et al in Phys. Rev. Letters, Vol 63, 420 (1989). These authors disclose further processing of a one-dimensional quantum well structure (superlattice) to achieve two-dimensional confinement. A single quantum well layer was selectively etched to define quantum well lines or wires.
Free standing crystalline silicon wires have been reported by Potts et al, Appl Phys. Lett. 52, 834(1986). The wires were produced by the use of electron beam lithography and plasma etching on recrystallised silicon-on-insulator films. Four wires were formed by patterning a silicon layer to define lines, and then undercutting the lines by etching. This defined wires with longitudinal dimensions parallel to the substrate and the original layer plane. However, the number of wires was very small, and the average wire diameter was 600 nm, more than two orders of magnitude above that required to exhibit above- bandgap luminescence in accordance with the prior art of Furukawa et al.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an alternative method of making silicon quantum wires.
The present invention provides a method of producing silicon quantum wires including the steps of:
(1) anodizing silicon material to produce a porous layer therein, and
(2) etching the porous layer to widen the pores sufficiently to produce pore overlap thereby defining discrete quantum wires.
The invention provides the advantage that it is a simple but effective technique of producing silicon quantum wires particularly silicon quantum wires with diameters of 3 nm or less. Material processed in accordance with the invention has exhibited photoluminescence similar to that of Furukawa et al for quantum dots. This indicates that wire diameters in the region of 3 nm or less have been achieved.
Anodization may be carried out to produce porosity in the range 20% to 80%, and etching may then be performed at a rate in the range 0.0001 nm to 10 nm per minute to provide an increase in porosity to a value in the range 60% to 90%. The etch rate is preferably in the range 0.01 nm to 10 nm per minute. To minimise processing costs, the etch rate should be as high as possible consistent with the production of well-defined quantum wires. Anodization may be carried out in aqueous or ethanoic hydrofluoric acid of concentration in the range 10% to 50% by weight. An anodizing current density of 5 to 500 mAmp/cm
2
may be applied for 10 to 6000 seconds, as appropriate to requirements of layer thickness, porosity and conductivity magnitude and type.
In an alternative aspect, the invention also provides a semiconductor device made by a technique incorporating the method of the invention as aforesaid.


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