Fishing – trapping – and vermin destroying
Patent
1990-04-02
1992-08-25
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 51, 437 90, 437905, 357 20, H01L 3112
Patent
active
051418789
ABSTRACT:
An integrated photodiode is formed by providing a silicon substrate with a deep recessed tub in excess of about 20 microns, forming an isolated p-n junction on the peripheral tub surfaces, and selectively epitaxially filling the tub with intrinsic silicon. A desired monolithic integrated circuit is fabricated outside the tub periphery using conventional VLSI techniques. A photodiode electrode structure within the tub periphery can be fabricated at the same time as other monolithic circuit components are formed.
REFERENCES:
patent: 4904607 (1990-02-01), Riglet et al.
patent: 4956304 (1990-09-01), Cockrum et al.
patent: 4972244 (1990-11-01), Buffet et al.
patent: 5010018 (1991-04-01), Polasko et al.
S. Miura, et al. "A Novel Planarization Technique for Optoelectronic Integrated Circuits and Its Application to a Monolithic AlGaAs/GaAs p-i-n FET", I.E.E.E. Transactions on Electron Devices, vol. ED-34 (1987).
Benton Janet L.
Jindal Renuka P.
Xie Ya-Hong
AT&T Bell Laboratories
Books Glen E.
Chaudhuri Olik
Pham Long
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