Silicon-on-sapphire mesa transistor having doped edges

Details Silicon-on-sapphire mesa transistor having doped edges Silicon-on-sapphire mesa transistor having doped edges

1976-12-27

1977-10-18

Miller, Jr., Stanley D.

357 49, 357 52, 357 91, 357 56, H01L 2978

Patent

active

040548953

ABSTRACT:
Instabilities in the leakage current and threshold voltage of a field effect transistor on an insulator substrate, at both room temperature and after operation at relatively high temperatures (150.degree. C), are substantially reduced by selectively doping edge regions adjacent the transverse side surfaces of the channel region of the field effect transistor, wherein the breakdown voltage of the channel-to-drain junction is substantially increased. Atoms are placed in these edge regions to provide therein a carrier concentration of at least 5 .times. 10.sup.16 atoms-cm.sup.-3 of the opposite conductivity type to that of the source and drain regions. The doped edge region extends partly across said channel region and extends fully across the side surface at the end of the source region.

REFERENCES:
patent: 3890632 (1975-06-01), Ham et al.
patent: 4015279 (1977-03-01), Ham

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