Silicon-on-insulator wafer having conductive layer for...

Semiconductor device manufacturing: process – Including control responsive to sensed condition

Reexamination Certificate

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C438S010000, C438S017000, C438S406000, C438S455000

Reexamination Certificate

active

06238935

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to integrated circuits and in particular to a method for manufacturing wafers for use in manufacturing integrated circuits. Still more particularly, the present invention relates to a method for manufacturing a silicon-on-sapphire wafer.
2. Description of the Related Art
The use of sapphire substrates in the production of semiconductor devices, such as silicon-on-sapphire (SOS) devices, has greatly increased. SOS integrated circuit technology is a promising field for advanced high speed integrated circuits for computer and microwave applications.
Integrated circuit manufacturing equipment has evolved in recent years through the use of robotic wafer transfer systems. For those robotic wafer transfer systems to function, the robot must be able to sense either optically or electrically the presence of a silicon wafer. These robot sensors have evolved around the properties of a silicon wafer—the sensors are looking for an opaque, conductive object. This sensor evolution has rendered these tools incompatible for manufacturing integrated circuits using wafers with properties different than those of silicon wafers. The ability to process SOS wafers with standard silicon-wafer-processing equipment is important for a profitable SOS manufacturing environment. However, since the SOS wafer is translucent and an insulator, the SOS wafer is an example of a substrate that is incompatible with common silicon wafer integrated circuit processing equipment.
Therefore, it would be advantageous to have a SOS wafer that is compatible with presently available silicon wafer integrated circuit processing equipment.
SUMMARY OF THE INVENTION
It is therefore one object of the present invention to provide an improved method for processing integrated circuits.
It is another object of the present invention to provide an improved method for processing integrated circuits on silicon-on-sapphire wafers using equipment designed for processing silicon wafers.
It is yet another object of the present invention to provide an improved silicon-on-sapphire wafer that can be processed by silicon-wafer-processing equipment.
The foregoing objects are achieved as is now described. The present invention allows for a backside wafer coating process that makes SOS wafers compatible with common semiconductor processing equipment and processing conditions. This compatibility is accomplished by depositing a layer on a backside of a silicon-on-sapphire wafer, the layer having optical and electrical properties of silicon, wherein the silicon-on-sapphire wafer may be sensed by sensors designed to sense a presence of a silicon wafer.
The above as well as additional objects, features, and advantages of the present invention will become apparent in the following detailed written description.


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patent: 4348803 (1982-09-01), Sasaki
patent: 4608095 (1986-08-01), Hill
patent: 4608096 (1986-08-01), Hill
patent: 4732867 (1988-03-01), Schnable
patent: 4755482 (1988-07-01), Nagakubo
patent: 5006479 (1991-04-01), Brandewie
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patent: 55-41709 (1980-03-01), None
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patent: 57-153445 (1982-09-01), None
patent: 57-162346 (1982-10-01), None
IBM Technical Disclosure Bulletin, vol. 16, No. 10, Mar. 1974, pp. 3166-3167, “Diode-Capacitor Memory Cells Supported on a Sapphire Substrate” by G.F. Guhman.
IBM Technical Disclosure Bulletin, vol. 16, No. 10, Mar. 1974, pp. 3168-3169., “Capacitor-Diode Memory Cell Process” by H.L. Kalter.

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