Fishing – trapping – and vermin destroying
Patent
1988-07-08
1990-10-23
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 27, 437 30, 437 34, 437 44, 437 50, 437 57, 437 74, 437200, 437938, H01L 21266, H01L 21336
Patent
active
049652133
ABSTRACT:
A silicon-on-insulator MOS transistor is disclosed which has an implanted region on the source side of the gate electrode for making contact to the body node. A contact region of the same conductivity type as the body node, (for example, a p+ region for an n-channel transistor) is formed within the source region in a self-aligned fashion relative to the gate electrode. Ohmic connection is then made between the abutting source region and the contact region, for example by way of silicidation. Since the contact region is of the same conductivity as the body node, a non-rectifying ohmic contact is made between the source and body nodes of the transistor. For SOI CMOS technology, no additional mask steps are required for formation of the contact, as the source/drain implant masks required for the masking of opposite conductivity type regions can be used for the formation of the contact region.
REFERENCES:
patent: 4053916 (1977-10-01), Cricchi et al.
patent: 4753896 (1988-06-01), Matloubian
patent: 4906587 (1990-03-01), Blake
Tihanyi et al., "Influence of the Floating Substrate Potential on the Characteristics of ESFI MOS Transistors", Solid State Electronics, 1975, (Pergamon), vol. 18, pp. 309-314.
Lee et al., "Island-Edge Effects in C-MOS/SOS Transistors", IEEE Transactions on Electron Devices, vol. Ed-25, No. 8, Aug. 1978, pp. 971-978.
Tihanyi et al., "Properties of ESFI MOS Transistors Due to the Floating Substrate and the Finite Volume", IEEE Trans. on Electron Devices, vol. ED-22, No. 11, (Nov. 1975), pp. 1017-1023.
Kumamoto et al., "An SOI Structure for Flash A/D Converter", IEEE Journal of Solid-State Circuits, vol. 23, No. 1, (Feb. 1988), pp. 198-201.
Chaudhuri Olik
Comfort James T.
Ojan Ourmazd
Sharp Melvin
Stoltz Richard A.
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