Silicon-on-insulator channel architecture for automatic test...

Details Silicon-on-insulator channel architecture for automatic test... Silicon-on-insulator channel architecture for automatic test...

2005-02-08

2005-02-08

Zarneke, David (Department: 2829)

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

C324S645000

Reexamination Certificate

active

06853181

ABSTRACT:
A channel architecture for use in automatic test equipment is disclosed. The channel architecture comprises pattern generation circuitry and timing circuitry responsive to the pattern generation circuitry to generate timing signals. Formatting circuitry coupled to the output of the timing circuitry generates pulse waveforms for application to pin electronics circuitry. The pin electronics circuitry is responsive to the formatting circuitry for interfacing the automatic test equipment to a device-under-test. The pattern generation circuitry, the timing circuitry, the formatting circuitry and the pin electronics circuitry are formed on the same integrated circuit.

REFERENCES:
patent: 6567031 (2003-05-01), Rezvani et al.
patent: 6660598 (2003-12-01), Hanafi et al.

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