1984-10-05
1986-03-04
Edlow, Martin H
357 50, 357 59, 357 55, 357 56, 357 41, H01L 2702
Patent
active
RE0320900
ABSTRACT:
A dynamic random access memory in which individual cells, including an access transistor and a storage capacitor, are formed in mesas formed on a silicon chip. The access transistor of the cell is formed on the top surface of the mess and one plate of the storage capacitor of the cell is formed by the sidewall of the mesa and the other plate by doped polycrystalline silicon which fills the grooves surrounding the mesas isolated therefrom by a silicon dioxide layer. By this geometry, large storage surfaces, and so large capacitances, can be obtained for the capacitor without using surface area of the chip. In other embodiments, the mesas may include other forms of circuit elements.
REFERENCES:
patent: 3500139 (1970-03-01), Frouin
patent: 3894893 (1975-07-01), Kabaya
patent: 4131910 (1978-12-01), Hartman
patent: 4140558 (1979-02-01), Murphy
patent: 4184085 (1980-01-01), Takahashi
patent: 4199772 (1980-04-01), Natori
patent: 4222062 (1980-09-01), Trotter
patent: 4260436 (1981-04-01), Taylor
patent: 4261772 (1981-04-01), Lane
patent: 4272776 (1981-01-01), Weyland
patent: 4455740 (1984-06-01), Iwai
Chatterjee et al, IEEE Trans. Electron Devices, vol. ED-26, No. 6, Jun. 1979, pp. 827 et seq.
IEEE Trans. Electron Devices, vol. ED-26, No. 4, Apr. 1979, pp. 38 et seq.
Jaccodine Ralph J.
Michejda John A.
AT&T Bell Laboratories
Edlow Martin H
Wilde Peter V. D.
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