Silicon integrated circuit region containing implanted arsenic a

Details Silicon integrated circuit region containing implanted arsenic a Silicon integrated circuit region containing implanted arsenic a

1978-05-22

1979-01-30

Rutledge, L. Dewayne

Metal treatment

Barrier layer stock material, p-n type

148 15, 148190, 357 91, H01L 21265, H01L 21203

Patent

active

041371038

ABSTRACT:
A method for forming N conductivity-type regions in a silicon substrate comprising ion implanting arsenic to form a region in said substrate having an arsenic atom concentration of at least 1 .times. 10.sup.-2 As atoms/total atoms in substrate, and ion implanting germanium into said substrate region. Even though the atomic radius of arsenic is very close to that of silicon -- the arsenic radius is only 0.5% smaller -- when high arsenic atom concentrations of at least 1 .times. 10.sup.-2 atoms/total atoms in the substrate are introduced in the substrate, and such high concentrations are only possible when arsenic is ion implanted, then atomic misfit dislocations will occur. The implanted germanium atoms compensate for the lattice strain in the silicon to minimize dislocations.

REFERENCES:
patent: 2868678 (1959-01-01), Shockley
patent: 3783050 (1974-01-01), Nanba et al.
patent: 3943016 (1976-03-01), Marcotte
Yoshihiro et al., "... P-Ge Double Implantations in Si" Ion-Impl.sup.n in S/C, ed. S. Namba, Plenum, 1974, 571.
Haskell et al., "Channeling ... in As-doped Si" J. Appl. Phys., 43 (1972) 3425.
Mader et al., "... Lattice Damage in As-Impl.sup.d ... Si" J. Vac. Sci. Technol. 13, 1976, 391.
Edel et al., "Stress Relief by Counterdoping" IBM-TDB, 13 (1970) 632.

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