Silicon gigabit metal-oxide-semiconductor device processing

Details Silicon gigabit metal-oxide-semiconductor device processing Silicon gigabit metal-oxide-semiconductor device processing

1983-12-02

1985-08-06

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29576W, 29576B, 148 15, 148187, 148188, H01L 21225, H01L 21425

Patent

active

045326975

ABSTRACT:
In a metal-oxide-semiconductor device process, parasitic capacitance is significantly reduced by differentially oxidizing a substrate and a gate mesa thereon prior to ion implantation and "drive-in" of the drain and source regions. This results in a channel region being formed in the substrate beneath and substantially coextensive with the gate mesa. The conductivity of the channel region is different from the conductivity of the adjacent source and drain regions. In one embodiment, the source and drain regions each extend to a greater depth into the substrate with increasing distance from the channel region.

REFERENCES:
patent: 3600235 (1971-08-01), Okumura
patent: 4181537 (1980-01-01), Ichinohe
patent: 4352238 (1982-10-01), Shimbo
patent: 4356622 (1982-11-01), Widmann
patent: 4417385 (1983-11-01), Temple
Hewlett-Packard Journal (1982), "MQMOS: A High-Performance NMOS Technology" by H. Fu et al., pp. 21-27.
J. Electrochem. Soc., 1978, "Thermal Oxidation of Phosphorus-Doped Polycrystalline Silicon in Wet Oxygen" by H. Sunami, pp. 892-897.
J. Electrochem. Soc., 1979, "Oxidation of Phosphorus-Doped Low Pressure and Atmospheric Pressure CVD Polycrystalline-Silicon Films" by T. I. Kamins, pp. 838-844.

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