Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1997-04-14
1998-09-22
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438425, 438426, 438437, 148DIG50, H07L 2176
Patent
active
058113460
ABSTRACT:
A semiconductor device isolating structure and method for forming such a structure. In one embodiment, an opening is formed through a mask layer overlying a semiconductor substrate. A trench of a desired depth is then etched into the semiconductor substrate at the area of the semiconductor substrate underlying the opening in the mask layer. The trench is then filled with a dielectric material. After an oxide planarizing process, the present invention exposes the dielectric-filled trench to an oxidizing environment. By filling the trench with dielectric material prior to the oxidization step, the present invention selectively oxidizes the semiconductor substrate at corners formed by the intersection of the sidewalls of the trench and the top surface of the semiconductor substrate. In so doing, the present invention forms smoothly rounded semiconductor substrate corners under the mask layer. Thus, the present invention eliminates the sharp upper corners associated with prior art shallow trench isolation methods.
REFERENCES:
patent: 4916086 (1990-04-01), Takahashi et al.
patent: 5130268 (1992-07-01), Liou et al.
patent: 5674775 (1997-10-01), Ho et al.
patent: 5719085 (1998-02-01), Moon et al.
Laparra Olivier
Pramanik Dipankar
Sur Harlan
Dang Trung
VLSI Technology Inc.
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