Silicon carrier having increased flexibility

Active solid-state devices (e.g. – transistors – solid-state diode – With groove to define plural diodes

Reexamination Certificate

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C257S618000, C257S622000

Reexamination Certificate

active

07345353

ABSTRACT:
An apparatus and method providing flexibility to a silicon chip carrier which, in at least one embodiment, comprises multiple chips and a silicon chip carrier having thinned regions between some adjacent chips, thus, allowing for increased flexibility and reduced package warpage.

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Knickerbocker, J. U. et al., Development of next-generation technology based on silicon carriers with fine-pitch chip interconnection, IBM J. Res. & Dev., 725-53, Jun. 2005.
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Knickerbocker et al, Development of Next-Generation System-On-Package (SOP) technology based on silicon carriers with fine-pitch chip interconnection, IBM J. Res. & Dev. vol. 49, No. 4/5 Jul./Sep. 2005.

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