Single-crystal – oriented-crystal – and epitaxy growth processes; – Forming from vapor or gaseous state – With pretreatment or preparation of a base
Reexamination Certificate
2001-04-06
2003-07-22
Utech, Benjamin L. (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Forming from vapor or gaseous state
With pretreatment or preparation of a base
Reexamination Certificate
active
06596080
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a single crystal silicon carbide useful as an electronic material and to a process for preparation of the same. In particular, the present invention relates to a single crystal silicon carbide having preferred characteristics in fabricating a semiconductor device such as low crystal defect density or small strain in crystal lattice, and to a process for preparation of the same.
2. Background Art
Crystal growth methods for silicon carbide (SiC) employed heretofore can be classified into two methods; one is bulk growth using sublimation method and the other is forming a thin film on a substrate by taking advantage of epitaxial growth.
The bulk growth using sublimation method has enabled polycrystalline polymorphs of high temperature phases, i.e., hexagonal (6H, 4H, etc.) silicon carbide, and it has also realized a substrate of SiC itself. However, this method suffered numerous defects (micropipes) induced inside the crystals, and found difficulty in increasing the area of the substrate.
On the other hand, the use of epitaxial growth on a single crystal substrate advantageously improves the controllability of impurities and realizes substrates with increased area, and overcomes the problem found in the sublimation method by reducing the formation of micro-pipes. Yet, in the epitaxial growth method, however, there is frequently found a problem concerning an increase in stacking fault defects attributed to the difference in lattice constants between the substrate material and the silicon carbide film. In particular, the use of silicon as the substrate to form thereon a silicon carbide leads to a considerable generation of twins and anti phase boundaries (APB) inside the growth layer of silicon carbide, because there is a large lattice mismatch between silicon carbide and the underlying silicon that is generally used as the substrate. Hence, these defects lead to a silicon carbide with inferior characteristics when applied to an electronic element.
As a method for reducing planar defects within the silicon carbide film, there is proposed, for instance, a technique for reducing the planar defects that are present in films having a specific thickness or more, said method comprising a step of forming a growth region on the substrate on which silicon carbide is grown, and a step of growing single crystal silicon carbide on the thus obtained growth region in such a manner that the thickness thereof should become equal to, or greater than, the thickness specific to the crystallographic direction on the growth plane (see JP-B-Hei6-41400, wherein the term “JP-B-” as referred herein signifies “an examined published Japanese Patent Application”). However, since two types of anti phase boundaries that are formed inside silicon carbide tend to be extended with increasing film thickness in directions orthogonal to each other, the anti phase boundaries cannot effectively be reduced. Furthermore, the superstructure that is formed on the surface of the grown silicon carbide cannot be controlled as desired. Thus, if independently grown regions combine with each other, an anti phase boundary that newly generates at the bonded portion unadvantageously impairs the electric characteristics.
As a means for effectively reducing the anti phase boundary, K. Shibahara et al. proposed a growth method of silicon carbide onto an Si (001) surface substrate in which a surface axis normal to the Si (001) plane was slightly tilted from the crystallographic <001> direction to the crystallographic <110> direction (i.e., an offset angle was introduced) (see Applied Physics Letter, vol. 50 (1987) pp.1888). In this method, steps in atomic level are introduced equi-spaced in one direction by slightly tilting the substrate. Thus, planar defects that are provided in parallel with the thus introduced steps are allowed to propagate, whereas the propagation of the planar defects that are present in a direction perpendicular to the steps (i.e., the direction crossing the steps) is effectively suppressed. Accordingly, as film thickness of the silicon carbide increases, among the two anti phase boundaries included in the film, an anti phase boundary extending in the direction parallel to the introduced steps extends in preference to the anti phase boundary extending in the orthogonal direction to the steps. Thus, the anti phase boundaries can be effectively reduced. However, as is shown in
FIG. 1
, this method induces the generation of undesirable anti phase boundary 1 and twins due to an increase in step density at the boundary between the silicon carbide and the silicon substrate. Hence, this method still suffers from a problem that the anti phase boundaries cannot be completely extinguished. In
FIG. 1
, numeral
1
represents an anti phase boundary that have generated at the steps of single atoms, numeral
2
denotes a conjunction of anti phase boundaries, numeral
3
denotes an anti phase boundary generated at the terrace on the surface of the silicon substrate, represents an offset angle, and &phgr; is an angle (54.7°) making the Si (001) plane with the antiphase boundary. The antiphase boundary
3
generated at the terrace on the surface of the substrate diminishes at the conjunction
2
of anti phase boundaries. However, the anti phase boundaries
1
generated at the monoatomic steps on the silicon substrate remain as they are because they have no counterparts for association.
Furthermore, in case of forming silicon carbide on the surface of a silicon substrate, an internal stress generates inside the silicon carbide layer due to the difference in the coefficient of thermal expansion between silicon and silicon carbide, to a mismatch in lattice constants, to the generation of defects that form inside silicon carbide, or to the influence of strain. Then, warping or strain generates on the silicon carbide that is formed on the silicon substrate attributed to the internal stress that is generated inside the silicon carbide layer. Hence, such a silicon carbide is unfeasible for use as a material for producing semiconductor devices.
In the light of such circumstances, an object of the present invention is to provide a process for producing a silicon carbide in which the anti phase boundaries are effectively reduced, and a process for producing a silicon carbide, in which the warping and strain attributed to internal stress are reduced.
Furthermore, another object of the present invention is to provide a single crystal silicon carbide reduced in anti phase boundaries and/or in warping and strain attributed to internal stress, and to a process for producing the same.
SUMMARY OF THE INVENTION
The aforementioned objects can be achieved by the present invention as follows.
In accordance with a first aspect of the present invention, there is provided a process for preparation of silicon carbide by depositing silicon carbide on at least a part of a surface of a substrate having on its surface undulations extending approximately in parallel with each other, wherein a center line average of said undulations is in a range of from 3 to 1,000 nm, gradients of inclined planes of said undulations are in a range of from 1° to 54.7°, and, in a cross section orthogonal to a direction along which the undulations are extended, portions at which neighboring inclined planes are brought in contact with each other are in a curve shape.
In accordance with a second aspect of the present invention, there is provided a process for preparation of silicon carbide by depositing silicon carbide on at least a part of a surface of a substrate having on its surface undulations extending approximately in parallel with each other, wherein a center line average of said undulations is in a range of from 3 to 1,000 nm, gradients of inclined planes of said undulations are in a range of from 1° to 54.7°, and said substrate is made of silicon or silicon carbide having a surface with a plane normal axis of <001> crystallographic direction and with an area of &lcu
Kawahara Takamitsu
Nagasawa Hiroyuki
Yagi Kuniaki
Anderson Matthew A.
Hoya Corporation
Utech Benjamin L.
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