Signature circuit responsive to an input signal

Details Signature circuit responsive to an input signal Signature circuit responsive to an input signal

1987-10-02

1989-02-21

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072021, 307441, 307451, 307219, H03K 19003

Patent

active

048067938

ABSTRACT:
An integrated circuit has a signature circuit which provides information concerning the integrated circuit itself. This information can, for example, specify that redundancy has or has not been implemented. Other potential information can relate to the particular mask set, the speed of the integrated circuit, and/or the manufacturer. The information is provided on a normal output terminal of the integrated circuit. A load is selectively coupled to the output terminal in response to an input signal of the integrated circuit if a particular node is programmed to a first logic state. If the particular node is programmed to a second logic state, the load is not responsive to the input signal. A load variation then indicates one condition of the integrated circuit, and no load variation indicates another condition. Numerous outputs can be similarly used to provide additional amounts of information according to some selected code.

REFERENCES:
patent: 4417154 (1983-11-01), Kuo
patent: 4428068 (1984-01-01), Baba
patent: 4446534 (1984-05-01), Smith
patent: 4480199 (1984-10-01), Varshney et al.
patent: 4613959 (1986-09-01), Jiang
patent: 4641285 (1987-02-01), Sasaki et al.
patent: 4716302 (1987-12-01), Flannagan et al.
Thoma, "Fuse State Detector and Inverter", IBM T.D.B., vol. 20, No. 4, Sep. 1977, pp. 1315-1316.
Sud et al, "Designing Static RAMs for Yield as Well as Speed", Electronics, Jul. 1981, pp. 121-126.

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