Signalling system

Pulse or digital communications – Cable systems and components

Patent

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Details

375219, 375319, 326 86, 326 90, H04B 302, H04L 2500

Patent

active

057612447

ABSTRACT:
A signalling system adapted for digital signals includes a signal transmitter, a signal receiver and a connection which connects the transmitter to the receiver. The transmitter includes an output buffer which has at least one transistor connected to the lowest level of a signal supply voltage, such as to "0" potential or earth potential. Driving or steering of the transistor in response to a received control signal causes the transistor to switch from a state of high impedance to a state of low impedance which exhibits resistive or at least predominantly resistive properties, such as to form an information-carrying output signal. A first of two series-connected transistors is connected to the lowest level of the signal supply voltage, for instance "0" or earth potential, and the other transistor is connected to the signal supply voltage. A connection conductor on which the information-carrying signal is transmitted is connected between the transistors. The transistors are brought to different states simultaneously, and in a state of low-impedance, the impedance value corresponds to the impedance value (the resistance value) of the connection.

REFERENCES:
patent: 4794283 (1988-12-01), Allen et al.
R.C. Frye et al., "Trends in Silicon-on-Silicon Multichip Modules", IEEE Design & Test of Computers, Dec. 1993, pp. 8-17.
Y. Nakagome et al., "Sub-1-V Swing Internal Bus Architecture for Future Low-Power ULSI's", IEEE Journal of Solid-State Circuits, vol. 28, No. 4, Apr. 1993, pp. 414-419.
B. Gunning et al., "A CMOS Low-Voltage-Swing Transmission-Line Transceiver", IEEE International Solid-State Circuits Conference, Paper No. WP 3.7, Feb. 1992, pp. 58-59.
"IEEE Standard for Low-Voltage Differential Signals for SCI (LVDS)", IEEE Std . P1596.3/D1, Dec. 1993, pp. 1-28.

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