Signaling bit suppression system

Details Signaling bit suppression system Signaling bit suppression system

2000-08-03

2004-08-03

Patel, Ajit (Department: 2664)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C375S362000

Reexamination Certificate

active

06771672

ABSTRACT:

TECHNICAL FIELD
This invention relates to detecting and suppressing signaling bits in a communications system and, more particularly, to suppressing the signaling bits in a GR-303 communications system.
BACKGROUND OF THE INVENTION
Communications systems change standards as they evolve over the years. The new standards and other reasons may cause the need to suppress bits in transmitted data. This is particularly true when new communications standards call for instructional or signaling bits to be implemented that hamper legacy equipment. Legacy equipment is that equipment utilized before new standards are implemented, which remains after the new communications standards are implemented.
An example of one such situation can be seen in a GR-303 system. GR-303 is a communications transmission loop standard that has become very popular, because it provides a modern standard that can help reduce operating costs and capital investment for equipment. In a GR-303 system, the Pulse Code Modulated (“PCM”) payload contains signaling bits in the least significant bit position for signaling and equipment control. However, the position of the signaling bit will be termed the particular bit for the universal scope of the invention. The signaling bits are extracted by the hardware at either the switch, central office, or the customer equipment, but they still remain in the PCM. Since the signaling bits occur only every six frames, they have little effect on the characteristics of the corresponding channel. However, the signaling bits are still present and may impact the performance of legacy hardware associated with the communications system.
The V.90 modem is an example of legacy equipment, wherein the performance is hampered by receiving signaling bits. Modem manufacturers are aware of V.90 field problems, when operating over some Cable Telephony/Hybrid Fiber Coax circuits that use GR-303 and T1 403.2 signaling. While there are some V.90 modems that were designed to handle this situation, a large percentage (estimated 90%) of legacy V.90 modems fallback to V.34 mode, fallback to low speed V.90, or have significantly reduced throughput.
Thus, there is a need in the art to suppress signaling or other particular bits in a communications environment to ensure that equipment capability will not be hampered as the communications industry standards change. The need should be met without excessive costs to implement new inventions or to update the existing equipment. There is a particular need for signaling bit suppression in the GR-303 communications environment.
SUMMARY OF THE INVENTION
The present invention overcomes the above described problems by utilizing a circuit, system, and algorithm to suppress the signaling bits or other problem causing bits, without the need to remove expensive equipment already being utilized in the communications system.
Generally described, the invention receives an incoming word of PCM information. The particular bit of that incoming word is received by a comparator, a compare-in input of a random access memory (RAM) or other readable memory device, and one input of a suppression function. The comparator compares the particular bit of the current incoming word of received data to the particular bit of a previous word of data in the same phase, which was stored in the RAM. A word of data can be any size of continuous logically associated bits. Thus a word that is one byte long would contain eight bits. The results of the comparison determine whether or not a specific signaling bit pattern is indicated. When there is an indication of a specific signaling bit pattern presence, the comparator outputs a transition signal with an increment value. When the comparator indicates there is not a specific signaling bit pattern present, the comparator outputs a transition signal with a decrement value. The integrator steps (counts) up to a user-defined maximum or back down to zero (0) based on the results of the comparator, whether the integrator is already at a user-defined maximum value (“suppression mode”) or zero (“non-suppression mode”), and the status of the integrator count prior to receiving the comparator signal. The suppression mode status (suppression-stat variable) and the count of the integrator are stored in the random access memory and fed-back to the integrator, via an algorithm function. If the integrator is in suppression mode, a logical high output is the suppression signal that is sent to the suppression function. However, if the integrator is in the non-suppression mode, a logical low output is the suppression signal that is the input sent to the suppression function. The suppression function output is based on the particular bit of the incoming received word input and the input from the integrator. The suppression function output suppresses the particular bit of the received word if the integrator is in suppression mode and passes the particular bit of the received word with an unchanged value, if the integrator is in a non-suppression mode. A combiner function creates an output word of data. The combiner function uses the suppression function output as the particular bit of the output word, and all the bits of the incoming word of data as the bits of the output word, except for the particular bit. This output word of data reflects the incoming word of data with suppressed signaling bits.
One skilled in the art will recognize that the invention need not be implemented with discrete solid state, semi-conductor, and digital logic components. One embodiment of the invention utilizes a memory element, and a processing unit. The memory element provides storage capability and stores a program module. The program module contains instructions that will perform all the functions of the invention. The program module is executed by a processing unit.
One embodiment of the invention resolves the problem of legacy equipment having throughput problems in the GR-303 communications environment, particularly the V.90 modem. The problems are caused by the signaling bits used in the communications loop. In a GR-303 communications system, each channel has signaling associated with it and the signaling is done by a series of bits in the form ABCD, where A, B, C, and D are each binary bits. There are sixteen combinations of ABCD, some of which are used to signal specific information.
There are normally multiple channels on a communications line (e.g. 24 channels on a T1 line). On each active channel, the words can each be assigned arbitrary phase values such that every word is in the same phase as the word six frames earlier and the word six frames later. A phase is defined as a discrete path for data within a channel that organizes associated words of data transmitted on a channel from the others in a separate phase of that channel. All of the particular bit's from exactly one of the six phases are used for signaling bits (e.g. there are six phases per channel on a T1 line). If it were known which phase was the signaling phase, it would be a trivial task to suppress the signaling bits. Since framing information is not necessarily available, it is not known which of the six phases is the signaling phase. However, if an algorithm is employed such that both of the following conditions are satisfied:
1. Applying the algorithm to a signaling phase causes all signaling bits to be suppressed,
2. Applying the algorithm to a non-signaling phase has no effect,
then it is not necessary to identify the signaling phase. Each channel in a GR-303 signaling system can be broken up into six independent phases, and the same algorithm can be applied to all six phases. One aspect of the present invention operates to identify the presence of a specific signaling bit pattern without having to identify the signaling phase or the signaling pattern content (the make-up of the ABCD pattern). By eliminating the task of explicitly identifying the signaling pattern or the signaling phase, the invention's circuitry and algorithm are simplified.
However, it should be noted that since the inventio

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