Signal waveform equalizer apparatus

Details Signal waveform equalizer apparatus Signal waveform equalizer apparatus

1998-10-02

2002-07-16

Pham, Chi (Department: 2631)

Pulse or digital communications

Equalizers

C375S344000

Reexamination Certificate

active

06421378

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a signal waveform equalizer apparatus used for a receiver unit in multivalued digital microwave communication.
In recent years, modulation/demodulation technique for digital microwave communication has tended to further increase the value thereof in order to utilize frequencies even more effectively. For example, not only QPSK and 16 QAM modulation techniques but also 64 QAM and 256 QAM modulation techniques and so forth are adopted in some cases.
As the value of modulation/demodulation is increased in this way, the more seriously signal quality is affected by distortion and the like generated in a transmission line. Thus, techniques for ensuring signals of normal quality for a receiver unit become more and more important. In order to meet such demand, an automatic adaptive equalizer for equalizing the signal, which has been received at a receiver unit through a transmission line, is provided.
FIG. 13
is a block diagram illustrating a transmission line and an exemplary equalization system therefor. As shown in
FIG. 13
, the quality of a signal, which has been transmitted by a transmitter, is varied in accordance with the characteristics of a transmission line, noise is added thereto and then the signal with a deformed waveform is received. Thus, the transmitted signal is affected by a ghost signal, which is received at a delayed time because of the influence of reflected waves and the like, so as to have a distorted waveform. Also, noise and the like cause phase and frequency errors in the signals. Affected by various complicated factors such as these, a signal having a different waveform than that of an originally transmitted signal is received by a receiver unit.
Thus, in the receiver unit, an equalizer is inserted to be serially connected to a receiver at a stage preceding the receiver, thereby equalizing a received signal X
0
into a signal Z
0
preferred by the receiver. And then, in order to restore original carrier waves, auto frequency control (AFC) and auto phase control (APC) are performed for removing frequency and phase errors, respectively.
If the noise is very small, equalization may be performed by an equalizer having a characteristic inverse of the transfer function of the transmission line. However, if the noise reaches a certain level, the equalizer must be designed taking the noise into consideration. In actuality, the equalizer is made up of digital filters, and such an equalizer is called a “digital equalizer”.
FIG. 14
is a block diagram illustrating an exemplary configuration for a digital filter. In
FIG. 14
, X
0
denotes a received signal input through the transmission line, X
1
through X
m
are signals obtained by making respective delay devices delay the received signal X
0
, and C
0
through C
m
denote respective equalization coefficients. The received signal X
0
is multiplied by the equalization coefficient C
0
by a multiplier. In a similar manner, the signals X
1
through X
m
are respectively multiplied by the equalization coefficients C
1
through C
m
by respective multipliers. The products obtained by the respective multipliers are added by an adder and the sum is output as an equalized signal Z
0
. In a digital filter, a component for multiplying a delayed signal by an associated equalization coefficient is called a “tap”. As described above, the equalized signal Z
0
is obtained by adding the products obtained by the respective taps. In this case, optimum equalization coefficients C
0
through C
m
most suitable for restoring the original signal must be calculated. An least mean square (LMS) algorithm is ordinarily used for calculating the equalization coefficients.
In accordance with a conventional technique (see Japanese Laid-Open Publication No. 7-66843), AFC/APC is implemented by a phase error detector, a loop filter and a digital VCO.
As described above, since an equalizer is made up of digital filters, complex multiplication is required. As the number of taps of the filter increases, the circuit size and the power consumption thereof also increase considerably. Also, in performing AFC/APC, a loop filter requires sum-of-products operations. Moreover, a digital VCO generally includes a means for storing data. Thus, if the number of bits of a signal is large, then the digital VCO requires an enormous storage capacity. From these points of view, it is an important problem to solve for a signal waveform equalizer apparatus to reduce the circuit size thereof.
On the other hand, as shown in
FIG. 13
, waveform equalization and AFC/APC cannot be completed in a single series of processing. Specifically, a signal, which has been subjected to AFC/APC, is fed back to the equalizer so as to equalize the waveform thereof again. Accordingly, waveform equalization and AFC/APC are repeatedly performed until the signal reaches and converges to a predetermined level. Ultimately, the signal is intended to be equalized and free from frequency and phase errors substantially simultaneously. In other words, the respective functions are not to be performed in such an independent manner that a signal is first equalized by waveform equalization and then errors are removed from the signal by AFC/APC. The effects of these two types of processing should be mutually enhanced by performing the equalization and AFC/APC simultaneously. Originally, equalization and AFC/APC are so closely correlated processes that it is hard to draw fully satisfactory results therefrom if these processes are performed independently. However, conventionally, there has been no block sharing these functions in common and these functions have been implemented by respectively independently components.
SUMMARY OF THE INVENTION
The object of this invention is providing a signal waveform equalizer apparatus of a reduced circuit size by integrating AFC/APC function with waveform equalization function.
Specifically, the present invention provides a signal waveform equalizer apparatus for equalizing the waveform of a signal, subjected to multivalued modulation and transmitted, with the waveform of an original signal yet to be transmitted The apparatus includes: a waveform equalization section for equalizing the input modulated signal in accordance with a least mean square (LMS) algorithm; an error estimation block for producing error data required for the waveform equalization section to update equalization coefficients; and an auto frequency control (AFC)/auto phase control (APC) block for removing frequency and phase errors from the input modulated signal. The AFC/APC block removes the frequency and phase errors from the input modulated signal in accordance with the LMS algorithm and updates the coefficients by using the error data produced by the error estimation block.
The signal waveform equalizer apparatus of the present invention includes: the waveform equalization section for equalizing the waveform of the modulated signal with the original one; and the AFC/APC block for removing frequency and phase errors from the modulated signal. And the AFC/APC block uses the error estimation block in common with the waveform equalization section. Accordingly, the function blocks implementing the waveform equalization and AFC/APC are not independent of each other, the AFC/APC function can be integrated into the signal waveform equalizer apparatus and the circuit size thereof can be considerably reduced.
In one embodiment of the present invention, the waveform equalization section is preferably divided into an anterior stage and a posterior stage. The modulated signal, output from the anterior stage of the waveform equalization section, is preferably input to the AFC/APC block and an output signal of the AFC/APC block is preferably input to the posterior stage of the waveform equalization section.
In another embodiment of the present invention, the anterior stage of the waveform equalization section is preferably a feed forward equalizer (FEE) block and the posterior stage of the waveform equalization section is preferably a decision fe

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