Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
1997-03-07
2001-02-06
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S333000, C327S321000, C327S315000, C326S030000, C326S086000
Reexamination Certificate
active
06184737
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to data-transmission systems using buses, and particularly relates to a data-transmission system employing a high-speed bus provided with termination.
2. Description of the Related Art.
As a processing speed of microprocessors increases, increased speed of data transmission is required between LSI chips employing an increased frequency of transmission signals. A TTL level and a CMOS level, which are input/output signal levels used in the related-art technology, suffer detrimental effects of signal reflections and crosstalk when a signal frequency exceeds about 50 MHz. In such a case, error-free data transmission becomes difficult.
In order to obviate this problem, input/output interfaces such as CTT (center tapped termination) and GTL (gunning transceiver logic) have been created, which use small-amplitude signals which have signal levels smaller than 1 V.
FIG. 1
is an illustrative drawing showing a GTL system. The GTL system of
FIG. 1
includes a bus
10
having characteristic impedance Z
0
, termination resistances Rt each connecting a respective end of the bus
10
to a termination voltage Vtt, stubs (or branch lines)
11
each having a characteristic impedance Z
1
and stemming from the bus
10
, and devices
20
connected at a respective end of each stub
11
, such devices including memories, controllers, etc. Here, the termination voltage Vtt is 1.2 V, and the termination resistance Rt is 50 &OHgr;.
An I/O node of the device
20
connected to the stub
11
has connections to an output circuit and an input buffer circuit in the device
20
. The output circuit of the device
20
includes a damping circuit
21
and a driver transistor
22
. The input buffer circuit of the device
20
includes a current-mirror-type differential amplifier comprising transistors
23
through
27
, and includes an inverter
28
. The current-mirror-type differential amplifier makes a comparison between a signal voltage applied to the I/O node and a reference voltage Vref, and outputs a low voltage level to the inverter
28
if the signal voltage is higher than the reference voltage Vref. If the signal voltage is lower than the reference voltage Vref, the current-mirror-type differential amplifier supplies a high voltage level to the inverter
28
. The inverter
28
inverts a supplied voltage to provide the inverted signal to internal circuits of the device
20
.
One of the advantages of the GTL system is that a wired-OR logic function can be implemented via a bus connection since the driver circuit (output circuit) uses a transistor of an open-drain type as shown in FIG.
1
. Another advantage is that a logic state on the bus
10
is either high or low, and is fixed to high when all drivers sharing the bus
10
are turned off. On the other hand, tri-state bus systems such as CTT have a logic state which is an intermediate level between high and low when all drivers are turned off. The input buffer circuit connected to the bus
10
thus receives a signal which cannot be determined as either high or low, and goes into an unstable state randomly detecting highs and lows depending on underlying noise. In order to avoid this, CTT systems need a command to prohibit operations of the input buffer circuits when all the drivers are tuned off.
A disadvantage of the GTL system is a generation of ringing waveforms after turning off of the drivers. Such ringing waveforms are created when a distance between the bus
10
and the driver transistor
22
is long (i.e., the stub
11
is long). For example, a signal frequency of 200 MHz and a length of the stub
11
above 2 mm create large ringing waveforms. Such ringing waveforms become apparent especially when there is parasitic inductance in lead frames and bonding wires.
FIG. 2
is an illustrative drawing showing parasitic inductances L
1
and C
1
present in lead frames and bonding wires. In
FIG. 2
, turning off of a switch S, which models the driver transistor
22
, generates a counterelectromotive force because of sudden cutting off of an electric current, resulting in a voltage pulse heading toward the bus
10
via the stub
11
. Since an intersection between the stub
11
and the bus
10
has an impedance mismatch, this voltage pulse is reflected at the intersection between the stub
11
and the bus
10
, returning to the driver transistor
22
via the stub
11
. The turned-off driver transistor
22
forms an open end, so that the voltage pulse is subjected to a 100% reflection to return to the stub
11
. There reflections are repeated, thereby creating intense ringing waveforms between the driver transistor
22
and the intersection of the stub
11
with the bus
10
.
FIGS. 3A through 3D
are charts showing computer-simulated ringing waveforms.
FIG. 3A
shows a case in which a stub length is zero.
FIG. 3B
shows a case in which a stub length is 1 cm.
FIG. 3C
is a case of the stub length being 2 cm, and
FIG. 3D
is a case in which the stub length is 5 cm.
FIG. 4
is an illustrative drawing showing conditions of the computer simulations. The computer simulations envisage a case where a driver DV writes data into a memory M
1
by using a signal frequency of 100 MHz under conditions that the driver DV and eight memories M
1
through M
8
are connected to a two-way data bus.
In
FIGS. 3A through 3D
, solid lines show waveforms at a driver end of the driver DV which writes the data into the memory M
1
, and dashed lines show waveforms at a receiver end of the memory M
1
. As shown in
FIGS. 3A through 3D
, the longer the stub length, the more intense the ringing waveforms.
In order to suppress the ringing waveforms, the driver transistor
22
can be controlled so as to achieve slow turning off. The damping circuit
21
of
FIG. 1
is provided for this purpose, and controls the driver transistor
22
to carry out slow turning off. The use of such a damping circuit
21
, however, places a cap on a maximum operation frequency of the device
20
, and, thus, is not preferable.
In light of these, a conventional technique for suppressing the ringing waveforms is to make the stub
11
short enough. Sufficient suppression of the ringing waveforms, however, requires the device
20
to be directly connected to the bus
10
by removing the stub
11
. If the device
20
is a memory IC, for example, the memory IC thus needs to be directly connected to bus wires on a mother board. In this case, memory ICs cannot be used in a module form. That is, since the memory ICs are directly connected to the bus wires, the memory ICs cannot be attached or detached freely. Expansion of memory ICs through attachment of new memory ICs, for example, thus become impossible.
Further, another problem arises if the memory ICs are directly attached to the bus
10
by removing the stub
11
. This problem is that a so-called shrink technology for reducing the size of memory chips cannot be used. Memory-chip manufacturers generally achieve cost cuts by reducing the size of memory chips. A reduction in the size of a memory chip, however, requires an increase in the length of lead frames connecting between a memory chip inside a package and pins provided outside the package, and this increase in the lead-frame length should be achieved without changing wire arrangements on the mother board. The increase in the lead-frame length therefore ends up creating stubs. In other words, the shrink technology cannot be used when memory ICs are directly connected to a bus.
Another disadvantage of the GTL system is that the relatively low termination voltage of 1.2 V temporarily creates a signal level on the bus having an intermediate voltage level between the high level and the low level. This intermediate voltage level is observed at an instance between when a given device produces a low output and when another device is selected to replace the given device to output a low level.
FIGS. 5A through 5D
are illustrative drawings for explaining a process in which an intermediate voltage level is created on a bus. A
Fujitsu Limited
Le Dinh T.
Nikaido Marmelstein Murray & Oram LLP
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