Electrical transmission or interconnection systems – Conductor arrangements or structure
Patent
1994-02-28
1996-01-09
Shoop, Jr., William M.
Electrical transmission or interconnection systems
Conductor arrangements or structure
375257, 379 90, H01B 1112
Patent
active
054831105
ABSTRACT:
One paired wiring traveling in parallel to a transmission path of a signal and a transmission path of reference voltage is used, and a terminal end resistor matched with the characteristic impedance is installed, and in a receiving circuit connected thereto, a differential input circuit with offset set to about 1/2 of the terminal end voltage is used, and an output circuit of open drain is used in a transmitting circuit. A high-speed information processing section using such a bus circuit and a low-speed information processing section using a conventional low-speed bus are mutually connected through an interface circuit to construct the system hierarchically.
REFERENCES:
patent: 5023488 (1991-06-01), Gunning
patent: 5355391 (1994-10-01), Horowitz et al.
patent: 5371424 (1994-12-01), Quigley et al.
Gunning, Bill, et al. "WP 3.7: A CMOS Low-Voltage-Swing Transmission-Line Transceiver," ISSCC (International Solid State Circuit Conference), Feb. 19, 1992, pp. 42-43 and 58-59. (provided in English).
Hososaka Satoshi
Koide Kazuo
Kudoh Junya
Mizukami Masao
Hitachi , Ltd.
Paladini Albert
Shoop Jr. William M.
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