Multiplex communications – Wide area network – Packet switching
Patent
1993-04-19
1994-12-27
Chin, Wellington
Multiplex communications
Wide area network
Packet switching
370 581, 3408258, 340827, H04Q 1104, H04L 1212
Patent
active
053771818
ABSTRACT:
A signal switching system connects a plurality of parallel inputs to a plurality of parallel outputs. The inputs pass through a parallel-to-serial converter, and the resulting serial signal passes through a switching matrix. The output of the switching matrix is converted to parallel form in a serial-to-parallel converter. A flip-flop is disposed in the line between the switching matrix and the serial-to-parallel converter. The flip-flop receives and stores the output of the switching matrix, and transfers that output to the serial-to-parallel converter. The transferring occurs only when the flip-flop changes state, which is also when the switching matrix becomes rearranged. Separate but synchronized clock pulse signals control the rearrangement of the switching matrix and the switching of the flip-flop. The flip-flop isolates the switching matrix from the serial-to-parallel converter, and prevents switching transients from entering the output stream.
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Article by C. Clos, entitled "A Study of Non-Blocking Switching Networks", The Bell System Technical J., Mar., 1953, pp. 406-424.
Article by M. C. Paull, entitled "Reswitching of Connection Networks", Bell System Technical J., May 1962, pp. 833-855.
C. J. Georgiou, "Parallel Interface Switching Mechanism", IBM Technical Disclosure Bulletin, vol. 27, No. 8, Jan. 1985, pp. 4690-4692.
Chin Wellington
Eilberg William H.
Linear Switch Corp.
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