Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating
Patent
1994-04-26
1996-11-26
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Clock or pulse waveform generating
327296, H03K 19096
Patent
active
055789552
ABSTRACT:
A signal is supplied to a number of synchronizing circuits with a small skew. A signal supply circuit (400a) includes four driver circuits (1a), (401), (402) and (403). The driver circuit (1a) receives an input signal which is supplied to synchronizing circuits (301) to (332). An output of the driver circuit (1a) is supplied to the left-hand side edge of a first wire (5). The driver circuits (401), (403) and (402) are disposed at the left-hand side edge, the right-hand side edge and a center of first wire (5), respectively, so that outputs from the driver circuits (401), (403) and (402) are supplied to a second wire (6). Input terminals of the synchronizing circuits (301) to (332) are each connected to the second wire (6). The driver circuits (401), (402) and (403), i.e., second signal transmitting elements, start transmission in this order, and therefore, a transition of the signal becomes abrupt at the driver circuits (401), (402) and (403) in this order.
REFERENCES:
patent: 4812684 (1989-03-01), Yamagiwa et al.
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patent: 5307381 (1994-04-01), Ahuja
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Proceedings of the IEEE 1990 Custom Integrated Circuits Conference, May 13-16, 1990, Takashi Saigo, et al., "Clock Skew Reduction Approach for Standard Cell", 16.4.1-16.4.3.
Proceedings of the IEEE 1993 Custom Integrated Circuits Conference, May 9-12, 1993, Nobuyuki Ikeda, et al., "O.5.mu.m 1M Gate CMOS SOG", pp. 23.2.1-23.2.4.
Furukawa Hiroshi
Matsue Shuichi
Callahan Timothy P.
Lam T.
Mitsubishi Denki & Kabushiki Kaisha
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