Signal selection arrangement

Details Signal selection arrangement Signal selection arrangement

1989-03-15

1991-07-30

Psitos, Aristotelis M.

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Data clocking

360 61, G11B 509, G11B 1512

Patent

active

050364090

ABSTRACT:
Several signal sources that produce corresponding digitally coded signals are coupled to a selection circuit. A microprocessor controls signal selection switches that select one of the signal sources in accordance with a priority schedule, provided that the signal source produces a signal at a frequency that is within a predetermined range of frequencies. The selected signal is then recorded in a tape recorder or forwarded to a signal reproducer device. To test whether a given signal source generates a signal at a frequency that is suitable for recording or reproducing purposes, the digitally coded signals from that source is coupled to an input of a phase-lock-loop circuit (PLL). When the signal causes a lock-in condition in the PLL, that signal source is then selected. If the lock-in condition does not occur, the test is applied to another signal source that is next in the priority schedule.

REFERENCES:
patent: 3922641 (1975-11-01), Gates, Jr.
patent: 4151565 (1979-04-01), Mazzola
patent: 4231071 (1980-10-01), Anderson
patent: 4398219 (1983-08-01), Yasuda
patent: 4688205 (1987-08-01), Abiko
patent: 4872151 (1989-10-01), Smith

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