Signal selecting circuit for simultaneously performing plural in

Details Signal selecting circuit for simultaneously performing plural in Signal selecting circuit for simultaneously performing plural in

1986-02-25

1988-08-09

Yusko, Donald J.

Communications: electrical

Continuously variable indicating

With meter reading

369 32, 340825030, H04Q 900, G11B 700

Patent

active

047631236

ABSTRACT:
A signal selecting circuit comprising a plurality of input terminals supplied with a plurality of signals, respectively, a plurality of gate circuits connected to the plurality of input terminals, respectively, a plurality of output terminals supplied with the plurality of signals through the plurality of gate circuits, respectively, a sequence counter for generating count values in order to designte one of the plurality of gate circuits, a decoding circuit for decoding the count values from the sequence counter so as to produce a plurality of gate signals so as to circulatively open the gate circuits and detecting circuit connected to the plurality of gate circuits and for detecting when at least one of the plurality of signals is obtained through one of the gate circuits which is in open state so as to produce an inhibiting signal being provided to the counter to stop the counting operation thereof and to keep the designation of the counter at the last designated gate circuit so that the plurality of signals can be taken out in an impartial priority order.

REFERENCES:
patent: 3560939 (1971-02-01), Lukacs
patent: 3633163 (1972-01-01), Birchmeier
patent: 3978285 (1976-08-01), Tan
patent: 4233592 (1980-11-01), Leichele
patent: 4275466 (1981-06-01), Yamamoto
patent: 4364029 (1982-12-01), Villa
patent: 4415881 (1983-11-01), Lechner et al.
patent: 4583208 (1986-04-01), Verboom
patent: 4587643 (1986-05-01), Monen et al.
patent: 4630231 (1986-12-01), Hirata et al.
patent: 4680764 (1987-07-01), Suzuki et al.
GB 2044044A, Oct. 8,1980, R. Wada, et al.

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