Signal selecting circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Parallel controlled paths

Reexamination Certificate

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Details

C327S565000, C327S407000

Reexamination Certificate

active

06437632

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a signal selection circuit, which is built in a large scale integrated circuit (LSI), selects an arbitrary signal from plural inputted signals and outputs the selected arbitrary signal to an arbitrary output terminal.
Description of the Related Art
Wiring and disposing components in a LSI have been automatically designed by using a computer aided design (CAD) system.
FIG. 1
is a circuit diagram showing a conventional signal selection circuit in a LSI. As shown in
FIG. 1
, the conventional signal selection circuit consists of four input terminals
1
to
4
, four output terminals
5
to
8
, four selection control terminals
9
to
12
, four decoding circuits (DECs)
79
, and twelve
2
-
1
selectors
78
. The DECs
79
decode control signals from the selection control terminals
9
to
12
and generate control signals to control the
2
-
1
selectors
78
. When the wiring and disposing components are designed by this circuit diagram, signals inputted from the input terminals
1
to
4
are transmitted in parallel to two input terminals of the
2
-
1
selectors
78
in an active state.
Recently, the LSI has become further large scale and high speed. With this, the number and the length of parallel wiring have increased, and the distance of parallel wiring has become long. Consequently, there are problems that crosstalk noise is generated and the duty ratio of signals is deteriorated. At this conventional signal selection circuit shown in
FIG. 1
, two active signals are transmitted in parallel, therefore, the crosstalk noise can be generated. And the signal is transmitted by single logic, that is, positive logic or negative logic, therefore, in case that a delay occurs only at either one of rise time and fall time, there is a problem that the duty ratio of the signal is changed.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a signal selection circuit, in which a resistant characteristic to crosstalk noise among signals can be achieved, and signals can be outputted without having the deterioration of the duty ratio of input signals, in a LSI that makes arbitrary input signals output to arbitrary output terminals by using control signals.
According to a first aspect of the present invention, for achieving the object mentioned above, there is provided a signal selection circuit, in which one signal is selected from plural inputted signals and the selected one signal is outputted. Said signal selection circuit provides plural select circuit blocks, which are disposed in a matrix state, for choosing whether each inputted signal is made to transmit or cut off, and input lines, which are wired to one direction, for making said plural inputted signals input to said plural select circuit blocks, and output lines, which are wired to the cross direction to said input lines, for making outputted signals from said plural select circuit blocks output.
According to a second aspect of the present invention, in the first aspect, said input lines and said output lines are disposed between wiring biased by a constant voltage.
According to a third aspect of the present invention, in the first aspect, said plural select circuit blocks are surrounded with wiring biased by a constant voltage.
According to a fourth aspect of the present invention, in the first aspect, said plural select circuit blocks are composed of circuits which inverse the logic of signal, and said input lines and said output lines also provide circuits which inverse the logic of signal.
According to the present invention, when one inputted signal from one input terminal is transmitted to one output terminal, the other inputted signals not selected can be inhibited by using control signals. Therefore, a resistant characteristic to crosstalk noise for the signal transmitting to said output terminal can be achieved. And said input terminals and said output terminals are not disposed in parallel, therefore, parallel wiring of said signal lines being in an active state is prevented, and the resistant characteristic to crosstalk noise can be achieved.
According to the present invention, wiring biased by the ground voltage or a constant voltage of the power source voltage is disposed at the both sides being the upper and lower sides or the right and left sides of said signal lines. Therefore, the bad influence caused by the crosstalk noise to said signal lines is prevented one another, and the resistant characteristic to crosstalk noise can be achieved. And said select circuit blocks are surrounded with wiring biased by the ground voltage or a constant voltage of the power source voltage. Therefore, the bad influence caused by the crosstalk noise to said select circuit blocks is prevented one another, and the resistant characteristic to crosstalk noise can be achieved.
According to the present invention, inverting circuits composed of NAND circuits and inverter circuits are used, therefore the duty ratio can be easily adjusted. Consequently, signals can be outputted without having the deterioration of the duty ratio.


REFERENCES:
patent: 5047760 (1991-09-01), Hofmann
patent: 5412380 (1995-05-01), Matsuda et al.
patent: 5420534 (1995-05-01), Elabd
patent: 4-343258 (1992-11-01), None
patent: 9-252240 (1997-09-01), None

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