Signal scrambler-unscrambler for binary coded transmission syste

Details Signal scrambler-unscrambler for binary coded transmission syste Signal scrambler-unscrambler for binary coded transmission syste

1973-10-10

1979-11-27

Birmiel, Howard A.

Telegraphy

Systems

Printing

325 32, H04L 900

Patent

active

041762479

ABSTRACT:
A method and an apparatus for encoding and decoding a binary digital data signal is disclosed. An input signal that is to be encoded for transmission is shifted through a serial shift register with the bits in the stages of the shift register at each of the successive shift periods being used to define a binary coded addressable location in an associated memory. The memory has stored in each of its addressable locations a further binary code that when addressed by the shift register produces, as an output, a binary True or Complement signal which through a True/Complement generator couples the True or the Complement of the input signal to the transmission medium. The receiving end of the transmission medium has a similar arrangement of shift register, memory and True/Complement generator that decodes the received encoded transmitted signal.

REFERENCES:
patent: 3515805 (1970-06-01), Fracassi et al.
patent: 3670104 (1972-06-01), Abrahamsen
patent: 3784743 (1974-01-01), Schroeder

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