Signal sampling network with reduced offset error

Details Signal sampling network with reduced offset error Signal sampling network with reduced offset error

1982-10-29

1985-02-26

Chin, Tommy P.

Facsimile and static presentation processing

Facsimile

Recording apparatus

358 27, 358 74, H04N 568

Patent

active

045020795

ABSTRACT:
A signal clamping and sampling system wherein signals to be sampled are applied to a voltage amplifier The output of the voltage amplifier is coupled in common to the inputs of first and second matched operational transconductance amplifiers (OTA's). s). During an initial clamping reference interval, the first OTA conducts to form a feedback clamping network for establishing input and output reference bias conditions for the voltage amplifier. The second OTA conducts during a subsequent sampling interval for processing signals to be sampled. The output reference bias of the voltage amplifier determines substantially identical input bias conditions for both the first and second OTA's, thereby significantly reducing the likelihood of signal processing offset errors being produced as between the clamping and sampling intervals when the first and second OTA's are respectively conductive.

REFERENCES:
patent: 4331981 (1982-05-01), Parker
patent: 4387405 (1983-06-01), Hinn
patent: 4414577 (1983-11-01), Tallant

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