Signal routing in processor arrays

Details Signal routing in processor arrays Signal routing in processor arrays

2009-02-09

2011-12-13

Sheikh, Ayaz (Department: 2476)

Multiplex communications

Data flow congestion prevention or control

Flow control of data transmission through a network

C370S248000, C370S252000, C370S351000, C370S389000, C370S401000, C326S037000, C326S038000, C326S039000, C326S040000, C326S041000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

08077623

ABSTRACT:
There is provided a method for routing a plurality of signals in a processor array, the processor array comprising a plurality of processor elements interconnected by a network of switches, each signal having a respective source processor element and at least one destination processor element in the processor array, the method comprising (i) identifying a signal from the plurality of unrouted signals to route; (ii) identifying a candidate route from the source processor element to the destination processor element, the candidate route using a first plurality of switches; (iii) evaluating the candidate route by determining whether there are offset values that allow the signal to be routed through the first plurality of switches; and (iv) attempting to route the signal using one of the offset values identified in step (iii).

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