Signal receiving circuit and signal input detection circuit

Details Signal receiving circuit and signal input detection circuit Signal receiving circuit and signal input detection circuit

2005-02-01

2010-10-05

Torres, Juan A (Department: 2611)

Pulse or digital communications

Receivers

Reexamination Certificate

active

07809084

ABSTRACT:
In a signal receiving circuit there are provided N input detection circuits2ato2nfor receiving clock signals S1-cto SN-c included in N channels of signals S1to SN. Each of the input detection circuits2ato2ndetects the transition of the input signal of the corresponding channel and further confirms that the signal of the corresponding channel is being received after the transition detection to thereby detect the input of the signal of the corresponding channel. The selection circuit3selects and outputs the clock signal and the data signal in the signal of the channel of which the input is detected. The selected output signal is successively subjected to input processes through one each of the phase synchronization circuit4, the serial/parallel conversion circuit5, etc., which are shared by N channels.

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Japanese Notice of Reasons for Rejections, w/ English translation thereof, issued in Japanese Patent Application No. JP 2006-513806 dated Jul. 14, 2009.

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