Signal quality monitoring device

Excavating

Patent

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371 6, G06F 1100, H03K 1332

Patent

active

045802637

ABSTRACT:
The error rate of a signal is monitored by sampling an input signal with a first clock and also with second and third clocks phase delayed in equal but opposite directions with respect to the first clock, and then logically combining the first through third sampled outputs in order to obtain an error signal.

REFERENCES:
patent: 4034340 (1977-07-01), Sant'Agostino
patent: 4247938 (1981-01-01), Kurihara et al.
patent: 4367550 (1983-01-01), Douverne
patent: 4375099 (1983-02-01), Waters et al.
Keelty et al., On-Line, Pseudo-Error Monitors for Digital Transmission Systems, IEEE Transactions on Comm., vol. COM-26, No. 8, Aug. 1978, pp. 1275-1282.
Takenaka et al., Bit Error Rate Monitor for Four Phase PSK Systems, 1980 Intl. Conf. on Communications, Seattle, WA., Jun. 8-12 1980, pp. 251-256.

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