Signal processors

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Patent

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Details

H03M 300

Patent

active

060208376

ABSTRACT:
A 1-bit signal processor receives a 1-bit signal having a first sampling rate eg 64 fs. An upconverter (41) increases the sampling rate to eg 128 fs. A series of Delta Sigma Modulators (42, 43) processes the signal. The processed signal is down-converted by a converter (44) to 64 fs. As least the Delta Sigma Modulators may be implemented on an integrated circuit. The down-converter is arranged to prevent noise being folded back into the signal band.

REFERENCES:
patent: 5061925 (1991-10-01), Sooch et al.
patent: 5625358 (1997-04-01), Wilson et al.
patent: 5627536 (1997-05-01), Ramirez

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