Signal processor for reducing undesirable signal content

Details Signal processor for reducing undesirable signal content Signal processor for reducing undesirable signal content

1998-08-03

2004-10-12

Isen, F. W. (Department: 2644)

Electrical audio signal processing systems and devices

Acoustical noise or sound cancellation

Counterwave generation control path

C381S071120, C381S094200, C381S094300

Reexamination Certificate

active

06804359

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates broadly to signal processing. More specifically, the invention relates to signal mapping and adaptive filtering to reduce undesirable signal content.
BACKGROUND OF THE INVENTION
Electronic systems often resolve a single signal into a pair of related signals. This representation allows better signal processing since often information about the single signal can be derived more readily from the pair of related signals.
An example of a pair of signals related to a single signal are in phase (I) and quadrature (Q) signals. In phase and quadrature signals are two analog signals derived by mathematical correlation with two periodic signals that differ by a phase difference of 90 degrees.
Another example of a pair of signals related to a single signal are even and odd signals. Produced by double sampling, even and odd signals are two digital signals that only differ by having been sampled at times different by half a clock period.
Systems that involve these pairs of signals rely heavily on the relationship between the constituent signals of the pair. Due to the imperfections in the circuitry, the expected difference in the pair of signals is usually not the difference that is actually realized.
For example, often I,Q systems suffer from unwanted image spectra due to imperfections in the circuitry used. A first stage of an I,Q receiver often comprises an I,Q mixer, as shown in FIG.
1
. The mixer comprises a multiplication of the input signal by the cosine and sine of a desired frequency. The sine is usually generated by introducing a 90 degree phase shift to the cosine, as shown in FIG.
1
(
a
). If the phase shift is not exactly 90 degrees or if the multipliers have different gains, leakage occurs between the I and Q signals. Therefore, the desired relationship between the I and Q signals is not exactly realized. I,Q systems often have analog to digital converters following the I,Q conversion, as seen in
FIG. 1
(
b
), and this also sometimes results in possible gain mismatch. These systems may also use complex filters to process the I and Q signals to obtain desired spectral information, as seen in FIG.
1
(
c
). These filters may be implemented as set of four real filters. If implemented in the analog domain, as shown in FIG.
1
(
c
), mismatch in the filter transfer functions will also cause spectral leakage.
The spectral leakage is shown in FIG.
2
. The input signal usually has unwanted frequency components above or below the first mixing frequency, &ohgr;
1
, spaced equally with the desired signal. FIG.
2
(
a
) shows the result of a frequency mix with a real signal, FIG.
2
(
b
) shows the result of a complex frequency mix. If the complex term is perfect then a simple frequency translation occurs. If the complex term is imperfect, as is the case in realizable circuits, then spectral leakage occurs. This leakage is a serious problem in I,Q receiver architectures. The spectral leakage degrades the signal to noise ratio and hence degrades performance.
There are many other ways to generate I and Q signals in the art. Some implementations resolve a signal into two components, process them and then recombine the signals. In these implementations there may be imperfections in the resolved signals which will affect the recombination integrity.
Further, the resolved signals may or may not be orthogonal.
Another example of undesirable signal content occurs in N-path filters. A subset of the class of circuits called N-path filters, with N being equal to two, is called double sampled circuits. A two-path circuit and its associated clock phases are illustrated in
FIGS. 3 and 4
, respectively. In this circuit, the input signal is sampled every half clock period, T
s
/2, and appears at the output with a half-clock period delay. Therefore, the effective sampling frequency in this two-path sample and hold circuit is twice the clock frequency. Thus, by using a pair of related signals a factor of two improvement in the speed of the double sampled circuit is achieved without increasing the clock rate or requiring a fast op-amp.
However, double sampled circuits suffer from image aliasing due to capacitor mismatch and uneven clock phases. The image caused in sampled analog circuits using the technique known as double sampling, is effectively the same effect as in the I,Q system previously described. In the double sampled system the error is caused not only by a physical mismatch, but also by temporal mismatch in the two phases of the clock. This is illustrated in FIG.
4
. In a single sampling system, a sample is taken on each rising or falling edge. In a double sampling system, both clock edges are used. Since T
2
and T
3
of
FIG. 4
are not equal, a sampling error occurs at every second sample. This is effectively a modulation at the clock frequency resulting in undesirable image spectra.
Images are also caused by sampled analog circuits using the general sampling technique used in N-path filters. The image in the case of N-path filters is created by temporal mismatch in N phases of a clock, as well as any physical mismatches in the N individual paths. The clock signals for N phases are illustrated in FIG.
5
.
Conventional approaches to this problem have been accurate device matching or device trimming techniques to address the physical matching requirements and attempt to cancel the imperfections.
Alternatively, receiver architectures that do not use multiple matched paths have been employed.
An improved signal processor which reduces the undesirable signal content due to circuitry imperfections is desirable.
SUMMARY OF THE INVENTION
An object of the invention is to provide an improved signal processor for reducing undesirable signal content due to circuitry imperfections.
In accordance with one aspect of the present invention, there is provided a signal processor for reducing undesirable signal content in a signal produced by an analog circuit having imperfections. The signal processor includes a signal mapping means for exaggerating the undesirable signal content; and an adaptive filter means for reducing the undesirable signal content using the exaggerated undesirable signal content.
Other advantages, objects and features of the present invention will be readily apparent to those skilled in the art from a review of the following detailed description of preferred embodiments in conjunction with the accompanying drawings and claims.


REFERENCES:
patent: 4709391 (1987-11-01), Kaizer et al.
patent: 5416845 (1995-05-01), Qun
patent: 5553014 (1996-09-01), De Leon et al.
patent: 5694476 (1997-12-01), Klippel
patent: 5815585 (1998-09-01), Klippel
patent: 5825898 (1998-10-01), Marash
patent: 5978489 (1999-11-01), Wan

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