Signal processor and method for Fourier Transformation

Details Signal processor and method for Fourier Transformation Signal processor and method for Fourier Transformation

1997-09-04

1999-10-19

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

G06F 1714

Patent

active

059681128

ABSTRACT:
Parallel signal processor (10) (FIG. 2) performs a Fourier Transformation of an input signal; The transformation coefficients are converted once to logarithmic form and stored in a cache memory. The input data is converted serially to logarithmic form, and fed to all processing units in parallel. The processing units compute their respective products as additions in the logarithmic domain. Then, the products are converted back to the normal domain. The products with the correct sign are summed by an accumulator of the respective processing element. After the last signal data point has run through the processing elements and the last products are added to their respective sums, all complex output signal data points are complete simultaneously.

REFERENCES:
patent: 4293921 (1981-10-01), Smith, Jr.
patent: 4563750 (1986-01-01), Clarke
patent: 5109356 (1992-04-01), Lawton
patent: 5751616 (1998-05-01), Hegland et al.

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